Retrospective

[Jacajack]

Things we should've done differently

[Jacajack]

clock should be a distinct type instead of a sensitivity level. Clocks deserve special treatment in many aspects.

[Jacajack]

We shall introduce statements for describing clock signal relationships. By default no two clocks are treated as synchronous. clock_imply(clk1, clk2) implies that every posedge on clk1 corresponds to a posedge on clk2. ! operator can be used to indicate that clocks are in opposite phase.

TODO: rethink whether expressions like clk1 = !clk2 should be legal at all. Maybe registers should offer three different inputs: clk, neg_clk, and ddr_clk.

[Jacajack]

Scope-free language design? Maybe if and for should only allow instances? Not sure about that, but it's worth consideration.

[Jacajack]

Tuples should have been added to allow powerful match expressions. Preferably with a more modern syntax (a, b, c) instead of {a, b, c}.

[Jacajack]

Procedural evaluation of generic signals. This would also allow generic module outputs.

[Jacajack]

Signal bundles/structures for grouping signals into hierarchies.

[Jacajack]

An even more consistent type system where we have bus<N>, ubus<N>, sbus<N> and wire as base types. No implicit conversions are possible. ubus, bus and sbus are variants of ubus<N>, bus<N> and sbus<N> with their widths deduced. Clocks should be handled separately.

Certain aliases should exist - like: int = sbus<32>, uint = ubus<32>, byte = sbus<8>, ubyte = ubus<8>, etc.

Additional generic sensitivity level should be added on HIRL-end.

[Jacajack]

Explicitly specify iterator type in for loops.

[Jacajack]

Reset types: async, sync and synchronized.

[Jacajack]

Automatic SVA generation.

[Jacajack]

The thing currently called Design should in fact be called DesignBuilder and should not perform any semantic checks. The builder should construct an optimized Design data structure later processed by the elaborator and codegen. This would allow easy multithreading since inner mutability is only required in the build phase.