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rkannoth1davem330
rkannoth1
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davem330
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octeontx2-pf: Fix coverity and klockwork issues in octeon PF driver
Fix unintended sign extension and klockwork issues. These are not real issue but for sanity checks. Signed-off-by: Ratheesh Kannoth <[email protected]> Signed-off-by: Suman Ghosh <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -648,14 +648,14 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for
648648
} else if (lvl == NIX_TXSCH_LVL_TL4) {
649649
parent = schq_list[NIX_TXSCH_LVL_TL3][prio];
650650
req->reg[0] = NIX_AF_TL4X_PARENT(schq);
651-
req->regval[0] = parent << 16;
651+
req->regval[0] = (u64)parent << 16;
652652
req->num_regs++;
653653
req->reg[1] = NIX_AF_TL4X_SCHEDULE(schq);
654654
req->regval[1] = dwrr_val;
655655
} else if (lvl == NIX_TXSCH_LVL_TL3) {
656656
parent = schq_list[NIX_TXSCH_LVL_TL2][prio];
657657
req->reg[0] = NIX_AF_TL3X_PARENT(schq);
658-
req->regval[0] = parent << 16;
658+
req->regval[0] = (u64)parent << 16;
659659
req->num_regs++;
660660
req->reg[1] = NIX_AF_TL3X_SCHEDULE(schq);
661661
req->regval[1] = dwrr_val;
@@ -670,11 +670,11 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for
670670
} else if (lvl == NIX_TXSCH_LVL_TL2) {
671671
parent = schq_list[NIX_TXSCH_LVL_TL1][prio];
672672
req->reg[0] = NIX_AF_TL2X_PARENT(schq);
673-
req->regval[0] = parent << 16;
673+
req->regval[0] = (u64)parent << 16;
674674

675675
req->num_regs++;
676676
req->reg[1] = NIX_AF_TL2X_SCHEDULE(schq);
677-
req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val;
677+
req->regval[1] = (u64)hw->txschq_aggr_lvl_rr_prio << 24 | dwrr_val;
678678

679679
if (lvl == hw->txschq_link_cfg_lvl) {
680680
req->num_regs++;
@@ -698,7 +698,7 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for
698698

699699
req->num_regs++;
700700
req->reg[1] = NIX_AF_TL1X_TOPOLOGY(schq);
701-
req->regval[1] = (TXSCH_TL1_DFLT_RR_PRIO << 1);
701+
req->regval[1] = hw->txschq_aggr_lvl_rr_prio << 1;
702702

703703
req->num_regs++;
704704
req->reg[2] = NIX_AF_TL1X_CIR(schq);

‎drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h‎

Lines changed: 28 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -139,33 +139,34 @@
139139
#define NIX_LF_CINTX_ENA_W1C(a) (NIX_LFBASE | 0xD50 | (a) << 12)
140140

141141
/* NIX AF transmit scheduler registers */
142-
#define NIX_AF_SMQX_CFG(a) (0x700 | (a) << 16)
143-
#define NIX_AF_TL1X_SCHEDULE(a) (0xC00 | (a) << 16)
144-
#define NIX_AF_TL1X_CIR(a) (0xC20 | (a) << 16)
145-
#define NIX_AF_TL1X_TOPOLOGY(a) (0xC80 | (a) << 16)
146-
#define NIX_AF_TL2X_PARENT(a) (0xE88 | (a) << 16)
147-
#define NIX_AF_TL2X_SCHEDULE(a) (0xE00 | (a) << 16)
148-
#define NIX_AF_TL2X_TOPOLOGY(a) (0xE80 | (a) << 16)
149-
#define NIX_AF_TL2X_CIR(a) (0xE20 | (a) << 16)
150-
#define NIX_AF_TL2X_PIR(a) (0xE30 | (a) << 16)
151-
#define NIX_AF_TL3X_PARENT(a) (0x1088 | (a) << 16)
152-
#define NIX_AF_TL3X_SCHEDULE(a) (0x1000 | (a) << 16)
153-
#define NIX_AF_TL3X_SHAPE(a) (0x1010 | (a) << 16)
154-
#define NIX_AF_TL3X_CIR(a) (0x1020 | (a) << 16)
155-
#define NIX_AF_TL3X_PIR(a) (0x1030 | (a) << 16)
156-
#define NIX_AF_TL3X_TOPOLOGY(a) (0x1080 | (a) << 16)
157-
#define NIX_AF_TL4X_PARENT(a) (0x1288 | (a) << 16)
158-
#define NIX_AF_TL4X_SCHEDULE(a) (0x1200 | (a) << 16)
159-
#define NIX_AF_TL4X_SHAPE(a) (0x1210 | (a) << 16)
160-
#define NIX_AF_TL4X_CIR(a) (0x1220 | (a) << 16)
161-
#define NIX_AF_TL4X_PIR(a) (0x1230 | (a) << 16)
162-
#define NIX_AF_TL4X_TOPOLOGY(a) (0x1280 | (a) << 16)
163-
#define NIX_AF_MDQX_SCHEDULE(a) (0x1400 | (a) << 16)
164-
#define NIX_AF_MDQX_SHAPE(a) (0x1410 | (a) << 16)
165-
#define NIX_AF_MDQX_CIR(a) (0x1420 | (a) << 16)
166-
#define NIX_AF_MDQX_PIR(a) (0x1430 | (a) << 16)
167-
#define NIX_AF_MDQX_PARENT(a) (0x1480 | (a) << 16)
168-
#define NIX_AF_TL3_TL2X_LINKX_CFG(a, b) (0x1700 | (a) << 16 | (b) << 3)
142+
#define NIX_AF_SMQX_CFG(a) (0x700 | (u64)(a) << 16)
143+
#define NIX_AF_TL4X_SDP_LINK_CFG(a) (0xB10 | (u64)(a) << 16)
144+
#define NIX_AF_TL1X_SCHEDULE(a) (0xC00 | (u64)(a) << 16)
145+
#define NIX_AF_TL1X_CIR(a) (0xC20 | (u64)(a) << 16)
146+
#define NIX_AF_TL1X_TOPOLOGY(a) (0xC80 | (u64)(a) << 16)
147+
#define NIX_AF_TL2X_PARENT(a) (0xE88 | (u64)(a) << 16)
148+
#define NIX_AF_TL2X_SCHEDULE(a) (0xE00 | (u64)(a) << 16)
149+
#define NIX_AF_TL2X_TOPOLOGY(a) (0xE80 | (u64)(a) << 16)
150+
#define NIX_AF_TL2X_CIR(a) (0xE20 | (u64)(a) << 16)
151+
#define NIX_AF_TL2X_PIR(a) (0xE30 | (u64)(a) << 16)
152+
#define NIX_AF_TL3X_PARENT(a) (0x1088 | (u64)(a) << 16)
153+
#define NIX_AF_TL3X_SCHEDULE(a) (0x1000 | (u64)(a) << 16)
154+
#define NIX_AF_TL3X_SHAPE(a) (0x1010 | (u64)(a) << 16)
155+
#define NIX_AF_TL3X_CIR(a) (0x1020 | (u64)(a) << 16)
156+
#define NIX_AF_TL3X_PIR(a) (0x1030 | (u64)(a) << 16)
157+
#define NIX_AF_TL3X_TOPOLOGY(a) (0x1080 | (u64)(a) << 16)
158+
#define NIX_AF_TL4X_PARENT(a) (0x1288 | (u64)(a) << 16)
159+
#define NIX_AF_TL4X_SCHEDULE(a) (0x1200 | (u64)(a) << 16)
160+
#define NIX_AF_TL4X_SHAPE(a) (0x1210 | (u64)(a) << 16)
161+
#define NIX_AF_TL4X_CIR(a) (0x1220 | (u64)(a) << 16)
162+
#define NIX_AF_TL4X_PIR(a) (0x1230 | (u64)(a) << 16)
163+
#define NIX_AF_TL4X_TOPOLOGY(a) (0x1280 | (u64)(a) << 16)
164+
#define NIX_AF_MDQX_SCHEDULE(a) (0x1400 | (u64)(a) << 16)
165+
#define NIX_AF_MDQX_SHAPE(a) (0x1410 | (u64)(a) << 16)
166+
#define NIX_AF_MDQX_CIR(a) (0x1420 | (u64)(a) << 16)
167+
#define NIX_AF_MDQX_PIR(a) (0x1430 | (u64)(a) << 16)
168+
#define NIX_AF_MDQX_PARENT(a) (0x1480 | (u64)(a) << 16)
169+
#define NIX_AF_TL3_TL2X_LINKX_CFG(a, b) (0x1700 | (u64)(a) << 16 | (b) << 3)
169170

170171
/* LMT LF registers */
171172
#define LMT_LFBASE BIT_ULL(RVU_FUNC_BLKADDR_SHIFT)

‎drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -513,7 +513,7 @@ static int otx2_tx_napi_handler(struct otx2_nic *pfvf,
513513

514514
static void otx2_adjust_adaptive_coalese(struct otx2_nic *pfvf, struct otx2_cq_poll *cq_poll)
515515
{
516-
struct dim_sample dim_sample;
516+
struct dim_sample dim_sample = { 0 };
517517
u64 rx_frames, rx_bytes;
518518
u64 tx_frames, tx_bytes;
519519

‎drivers/net/ethernet/marvell/octeontx2/nic/qos.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,6 @@ static void __otx2_qos_txschq_cfg(struct otx2_nic *pfvf,
153153
num_regs++;
154154

155155
otx2_config_sched_shaping(pfvf, node, cfg, &num_regs);
156-
157156
} else if (level == NIX_TXSCH_LVL_TL4) {
158157
otx2_config_sched_shaping(pfvf, node, cfg, &num_regs);
159158
} else if (level == NIX_TXSCH_LVL_TL3) {
@@ -176,7 +175,7 @@ static void __otx2_qos_txschq_cfg(struct otx2_nic *pfvf,
176175
/* check if node is root */
177176
if (node->qid == OTX2_QOS_QID_INNER && !node->parent) {
178177
cfg->reg[num_regs] = NIX_AF_TL2X_SCHEDULE(node->schq);
179-
cfg->regval[num_regs] = TXSCH_TL1_DFLT_RR_PRIO << 24 |
178+
cfg->regval[num_regs] = (u64)hw->txschq_aggr_lvl_rr_prio << 24 |
180179
mtu_to_dwrr_weight(pfvf,
181180
pfvf->tx_max_pktlen);
182181
num_regs++;

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