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Damon Dingrkhuangtao
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pwm: rockchip-test: Add demo for updating both period and duty in wave generator mode
The demo wave should be like: _ _ _ _ _ | | | | | | | | | | __| |_| |_| |_| |_| |_____________________________________ | | | | five 400K waves | delay 10ms | | | | Change-Id: I89c1d921dd2b230debe2664036b20c1d305cd35f Signed-off-by: Damon Ding <[email protected]>
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drivers/pwm/pwm-rockchip-test.c

Lines changed: 62 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,11 @@
1818
#define PWM_CONTROLLER_NUM_MAX 4
1919
#define PWM_CHANNEL_NUM_MAX 8
2020

21-
#define PWM_WAVE_8BIT_TEST 1
21+
#define PWM_WAVE_BREATHING_LIGHT_8BIT_TEST 1
2222

2323
/* 400k pwm_dclk src */
24-
#ifdef PWM_WAVE_8BIT_TEST
24+
#ifndef PWM_WAVE_PRIOD_DUTY_BOTH_UPDATE_TEST
25+
#ifdef PWM_WAVE_BREATHING_LIGHT_8BIT_TEST
2526
#define PWM_TABLE_MAX 256
2627
#define PWM_WIDTH_MODE PWM_WAVE_TABLE_8BITS_WIDTH
2728
/* in nanoseconds */
@@ -34,6 +35,7 @@
3435
#define PWM_WAVE_STEP 10000
3536
#define PWM_WAVE_RPT 10
3637
#endif
38+
#endif
3739

3840
struct pwm_test_data {
3941
struct pwm_device *pwm_dev;
@@ -156,8 +158,12 @@ static void pwm_rockchip_test_help_info(void)
156158
pr_info("\n");
157159
pr_info("wave generator demo:\n");
158160
pr_info("echo wave 0 1 true > /dev/pwm_rockchip_misc_test\n");
161+
pr_info("[brathing light demo with 8bit table]\n");
159162
pr_info("echo continuous 0 1 640000 320000 normal > /dev/pwm_rockchip_misc_test\n");
163+
pr_info("[brathing light demo with 16bit table]\n");
160164
pr_info("echo continuous 0 1 1000000 500000 normal > /dev/pwm_rockchip_misc_test\n");
165+
pr_info("[demo for updating both period and duty]\n");
166+
pr_info("echo continuous 0 1 1000 500 normal > /dev/pwm_rockchip_misc_test\n");
161167
pr_info("echo enable 0 1 true > /dev/pwm_rockchip_misc_test\n");
162168
pr_info("------------------------------------------------------------------------------------\n");
163169
}
@@ -200,7 +206,7 @@ static ssize_t pwm_rockchip_test_write(struct file *file, const char __user *buf
200206
struct pwm_device *pdev;
201207
struct pwm_state state;
202208
struct pwm_capture cap_res;
203-
struct rockchip_pwm_wave_table duty_table;
209+
struct rockchip_pwm_wave_table wave_table;
204210
struct rockchip_pwm_wave_config wave_config;
205211
struct rockchip_pwm_biphasic_config biphasic_config;
206212
enum rockchip_pwm_freq_meter_input_sel freq_input_sel;
@@ -627,14 +633,59 @@ static ssize_t pwm_rockchip_test_write(struct file *file, const char __user *buf
627633
goto exit;
628634
}
629635

636+
#ifdef PWM_WAVE_PRIOD_DUTY_BOTH_UPDATE_TEST
637+
/*
638+
* The output wave should be like:
639+
* _ _ _ _ _
640+
* | | | | | | | | | |
641+
* __| |_| |_| |_| |_| |_____________________________________
642+
*
643+
* | | |
644+
* | five 400K waves | delay 10ms |
645+
* | | |
646+
*/
647+
table[0] = 2500;
648+
table[1] = 500000; // avoid exceeding the 16-bit table
649+
table[2] = 500000;
650+
table[3] = 500000;
651+
table[4] = 500000;
652+
table[5] = 1250;
653+
table[6] = 0;
654+
table[7] = 0;
655+
table[8] = 0;
656+
table[9] = 0;
657+
658+
wave_table.table = table;
659+
wave_table.offset = 0;
660+
wave_table.len = 10;
661+
662+
wave_config.wave_table = &wave_table;
663+
wave_config.clk_src = PWM_SELECT_CLK_PWM;
664+
wave_config.mem_clk_src = PWM_SELECT_CLK_PWM_OSC;
665+
wave_config.width_mode = PWM_WAVE_TABLE_16BITS_WIDTH;
666+
wave_config.update_mode = PWM_WAVE_INCREASING;
667+
wave_config.enable = enable;
668+
wave_config.duty_en = true;
669+
wave_config.period_en = true;
670+
wave_config.clk_rate = 100000000;
671+
wave_config.rpt = 4;
672+
wave_config.duty_max = 9;
673+
wave_config.duty_min = 5;
674+
wave_config.period_max = 4;
675+
wave_config.period_min = 0;
676+
wave_config.offset = 0;
677+
wave_config.middle = 0;
678+
wave_config.max_hold = 0;
679+
wave_config.min_hold = 0;
680+
wave_config.middle_hold = 0;
681+
#else
630682
for (i = 0; i < PWM_TABLE_MAX; i++)
631683
table[i] = i * PWM_WAVE_STEP;
632-
duty_table.table = table;
633-
duty_table.offset = (channel_id % 3) * PWM_TABLE_MAX;
634-
duty_table.len = PWM_TABLE_MAX;
684+
wave_table.table = table;
685+
wave_table.offset = (channel_id % 3) * PWM_TABLE_MAX;
686+
wave_table.len = PWM_TABLE_MAX;
635687

636-
wave_config.duty_table = &duty_table;
637-
wave_config.period_table = NULL;
688+
wave_config.wave_table = &wave_table;
638689
wave_config.clk_src = PWM_SELECT_CLK_PWM;
639690
wave_config.mem_clk_src = PWM_SELECT_CLK_PWM_OSC;
640691
wave_config.width_mode = PWM_WIDTH_MODE;
@@ -653,6 +704,7 @@ static ssize_t pwm_rockchip_test_write(struct file *file, const char __user *buf
653704
wave_config.max_hold = 3;
654705
wave_config.min_hold = 0;
655706
wave_config.middle_hold = 2;
707+
#endif
656708

657709
ret = rockchip_pwm_set_wave(pdev, &wave_config);
658710
if (ret) {
@@ -662,8 +714,10 @@ static ssize_t pwm_rockchip_test_write(struct file *file, const char __user *buf
662714
goto exit;
663715
}
664716

717+
#ifndef PWM_WAVE_PRIOD_DUTY_BOTH_UPDATE_TEST
665718
pr_info("%s %s mode for pwm%d_%d: table_len = %d, table_step = %d\n",
666719
argv[2], cmd, controller_id, channel_id, PWM_TABLE_MAX, PWM_WAVE_STEP);
720+
#endif
667721
break;
668722
case PWM_GLOBAL_CTRL:
669723
if (!argv[0]) {

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