@@ -37,11 +37,6 @@ extern "C" {
37
37
#include " esp_mac.h"
38
38
#include " esp_flash.h"
39
39
40
- // Include for HPM (High Performance Mode) functions
41
- #if CONFIG_SPI_FLASH_HPM_ON
42
- #include " esp_private/spi_flash_os.h"
43
- #endif
44
-
45
40
// Include HAL layer for flash clock access
46
41
#include " hal/spi_flash_ll.h"
47
42
#if !CONFIG_IDF_TARGET_ESP32
@@ -533,9 +528,6 @@ uint64_t EspClass::getEfuseMac(void) {
533
528
// Flash Frequency Runtime Detection
534
529
// ============================================================================
535
530
536
- // Note: Using ESP-IDF HAL layer functions instead of direct register access
537
- // for better maintainability and chip-specific handling
538
-
539
531
/* *
540
532
* @brief Read the source clock frequency using ESP-IDF HAL functions
541
533
* @return Source clock frequency in MHz (80, 120, 160, or 240)
@@ -551,11 +543,8 @@ uint8_t EspClass::getFlashSourceFrequencyMHz(void) {
551
543
}
552
544
553
545
/* *
554
- * @brief Read the clock divider from hardware using HAL abstraction
546
+ * @brief Read the clock divider from hardware
555
547
* @return Clock divider value (1 = no division, 2 = divide by 2, etc.)
556
- *
557
- * @note This function still reads hardware registers but uses chip-specific
558
- * base addresses from ESP-IDF HAL layer
559
548
*/
560
549
uint8_t EspClass::getFlashClockDivider (void ) {
561
550
// Read CLOCK register using DR_REG_SPI0_BASE from soc/soc.h
@@ -567,25 +556,14 @@ uint8_t EspClass::getFlashClockDivider(void) {
567
556
return 1 ;
568
557
}
569
558
570
- // Bits 16-23: clkdiv_pre
571
- // This is consistent across all ESP32 chips
572
- uint8_t clkdiv_pre = (clock_val >> 16 ) & 0xFF ;
573
- return clkdiv_pre + 1 ;
574
- }
575
-
576
- // Bit 31: if set, clock is 1:1 (no divider)
577
- if (clock_val & (1 << 31 )) {
578
- return 1 ;
579
- }
580
-
581
559
// Bits 16-23: clkdiv_pre
582
560
uint8_t clkdiv_pre = (clock_val >> 16 ) & 0xFF ;
583
561
return clkdiv_pre + 1 ;
584
562
}
585
563
586
564
/* *
587
565
* @brief Get the actual flash frequency in MHz
588
- * @return Flash frequency in MHz
566
+ * @return Flash frequency in MHz (e.g., 80, 120, 160, 240)
589
567
*/
590
568
uint32_t EspClass::getFlashFrequencyMHz (void ) {
591
569
uint8_t source = getFlashSourceFrequencyMHz ();
@@ -595,40 +573,3 @@ uint32_t EspClass::getFlashFrequencyMHz(void) {
595
573
596
574
return source / divider;
597
575
}
598
-
599
- /* *
600
- * @brief Check if High Performance Mode is enabled
601
- * @return true if flash runs > 80 MHz, false otherwise
602
- *
603
- * @note This function combines hardware register reading with ESP-IDF HPM status
604
- * to provide accurate HPM detection across all scenarios.
605
- */
606
- bool EspClass::isFlashHighPerformanceModeEnabled (void ) {
607
- uint32_t freq = getFlashFrequencyMHz ();
608
-
609
- // Primary check: If frequency is > 80 MHz, HPM should be active
610
- if (freq <= 80 ) {
611
- return false ;
612
- }
613
-
614
- #if CONFIG_SPI_FLASH_HPM_ON
615
- // Secondary check: Use ESP-IDF HPM functions if available
616
- // spi_flash_hpm_dummy_adjust() returns true if HPM with dummy adjustment is active
617
- // Note: Some flash chips use other HPM methods (command, status register),
618
- // so we also trust the frequency reading
619
- bool hpm_dummy_active = spi_flash_hpm_dummy_adjust ();
620
-
621
- // If dummy adjust is active, definitely in HPM mode
622
- if (hpm_dummy_active) {
623
- return true ;
624
- }
625
-
626
- // If frequency > 80 MHz but dummy adjust not reported,
627
- // HPM might be enabled via other method (command/status register)
628
- // Trust the frequency reading in this case
629
- return true ;
630
- #else
631
- // If HPM support not compiled in, rely on frequency reading only
632
- return true ;
633
- #endif
634
- }
0 commit comments