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Update Esp.cpp
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cores/esp32/Esp.cpp

Lines changed: 2 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -37,11 +37,6 @@ extern "C" {
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#include "esp_mac.h"
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#include "esp_flash.h"
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40-
// Include for HPM (High Performance Mode) functions
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#if CONFIG_SPI_FLASH_HPM_ON
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#include "esp_private/spi_flash_os.h"
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#endif
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// Include HAL layer for flash clock access
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#include "hal/spi_flash_ll.h"
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#if !CONFIG_IDF_TARGET_ESP32
@@ -533,9 +528,6 @@ uint64_t EspClass::getEfuseMac(void) {
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// Flash Frequency Runtime Detection
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// ============================================================================
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// Note: Using ESP-IDF HAL layer functions instead of direct register access
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// for better maintainability and chip-specific handling
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/**
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* @brief Read the source clock frequency using ESP-IDF HAL functions
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* @return Source clock frequency in MHz (80, 120, 160, or 240)
@@ -551,11 +543,8 @@ uint8_t EspClass::getFlashSourceFrequencyMHz(void) {
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}
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/**
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* @brief Read the clock divider from hardware using HAL abstraction
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* @brief Read the clock divider from hardware
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* @return Clock divider value (1 = no division, 2 = divide by 2, etc.)
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*
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* @note This function still reads hardware registers but uses chip-specific
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* base addresses from ESP-IDF HAL layer
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*/
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uint8_t EspClass::getFlashClockDivider(void) {
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// Read CLOCK register using DR_REG_SPI0_BASE from soc/soc.h
@@ -567,25 +556,14 @@ uint8_t EspClass::getFlashClockDivider(void) {
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return 1;
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}
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// Bits 16-23: clkdiv_pre
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// This is consistent across all ESP32 chips
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uint8_t clkdiv_pre = (clock_val >> 16) & 0xFF;
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return clkdiv_pre + 1;
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}
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// Bit 31: if set, clock is 1:1 (no divider)
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if (clock_val & (1 << 31)) {
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return 1;
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}
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// Bits 16-23: clkdiv_pre
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uint8_t clkdiv_pre = (clock_val >> 16) & 0xFF;
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return clkdiv_pre + 1;
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}
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/**
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* @brief Get the actual flash frequency in MHz
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* @return Flash frequency in MHz
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* @return Flash frequency in MHz (e.g., 80, 120, 160, 240)
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*/
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uint32_t EspClass::getFlashFrequencyMHz(void) {
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uint8_t source = getFlashSourceFrequencyMHz();
@@ -595,40 +573,3 @@ uint32_t EspClass::getFlashFrequencyMHz(void) {
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return source / divider;
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}
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/**
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* @brief Check if High Performance Mode is enabled
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* @return true if flash runs > 80 MHz, false otherwise
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*
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* @note This function combines hardware register reading with ESP-IDF HPM status
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* to provide accurate HPM detection across all scenarios.
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*/
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bool EspClass::isFlashHighPerformanceModeEnabled(void) {
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uint32_t freq = getFlashFrequencyMHz();
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// Primary check: If frequency is > 80 MHz, HPM should be active
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if (freq <= 80) {
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return false;
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}
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#if CONFIG_SPI_FLASH_HPM_ON
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// Secondary check: Use ESP-IDF HPM functions if available
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// spi_flash_hpm_dummy_adjust() returns true if HPM with dummy adjustment is active
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// Note: Some flash chips use other HPM methods (command, status register),
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// so we also trust the frequency reading
619-
bool hpm_dummy_active = spi_flash_hpm_dummy_adjust();
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621-
// If dummy adjust is active, definitely in HPM mode
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if (hpm_dummy_active) {
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return true;
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}
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// If frequency > 80 MHz but dummy adjust not reported,
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// HPM might be enabled via other method (command/status register)
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// Trust the frequency reading in this case
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return true;
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#else
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// If HPM support not compiled in, rely on frequency reading only
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return true;
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#endif
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}

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