Skip to content

Commit 1cd3bf3

Browse files
Jiapeng Chonghdeller
authored andcommitted
fbdev: radeon: Clean up some inconsistent indenting
No functional modification involved. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1932 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Helge Deller <[email protected]>
1 parent 3119cab commit 1cd3bf3

File tree

1 file changed

+23
-23
lines changed

1 file changed

+23
-23
lines changed

drivers/video/fbdev/aty/radeon_base.c

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -2094,34 +2094,34 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
20942094
u32 tmp;
20952095

20962096
/* framebuffer size */
2097-
if ((rinfo->family == CHIP_FAMILY_RS100) ||
2097+
if ((rinfo->family == CHIP_FAMILY_RS100) ||
20982098
(rinfo->family == CHIP_FAMILY_RS200) ||
20992099
(rinfo->family == CHIP_FAMILY_RS300) ||
21002100
(rinfo->family == CHIP_FAMILY_RC410) ||
21012101
(rinfo->family == CHIP_FAMILY_RS400) ||
21022102
(rinfo->family == CHIP_FAMILY_RS480) ) {
2103-
u32 tom = INREG(NB_TOM);
2104-
tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
2105-
2106-
radeon_fifo_wait(6);
2107-
OUTREG(MC_FB_LOCATION, tom);
2108-
OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
2109-
OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
2110-
OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
2111-
2112-
/* This is supposed to fix the crtc2 noise problem. */
2113-
OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
2114-
2115-
if ((rinfo->family == CHIP_FAMILY_RS100) ||
2116-
(rinfo->family == CHIP_FAMILY_RS200)) {
2117-
/* This is to workaround the asic bug for RMX, some versions
2118-
of BIOS doesn't have this register initialized correctly.
2119-
*/
2120-
OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
2121-
~CRTC_H_CUTOFF_ACTIVE_EN);
2122-
}
2123-
} else {
2124-
tmp = INREG(CNFG_MEMSIZE);
2103+
u32 tom = INREG(NB_TOM);
2104+
2105+
tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
2106+
radeon_fifo_wait(6);
2107+
OUTREG(MC_FB_LOCATION, tom);
2108+
OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
2109+
OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
2110+
OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
2111+
2112+
/* This is supposed to fix the crtc2 noise problem. */
2113+
OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
2114+
2115+
if ((rinfo->family == CHIP_FAMILY_RS100) ||
2116+
(rinfo->family == CHIP_FAMILY_RS200)) {
2117+
/* This is to workaround the asic bug for RMX, some versions
2118+
* of BIOS doesn't have this register initialized correctly.
2119+
*/
2120+
OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
2121+
~CRTC_H_CUTOFF_ACTIVE_EN);
2122+
}
2123+
} else {
2124+
tmp = INREG(CNFG_MEMSIZE);
21252125
}
21262126

21272127
/* mem size is bits [28:0], mask off the rest */

0 commit comments

Comments
 (0)