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dt-bindings: pinctrl: update bindings for MT7986 SoC
Add wifi pins in the description and set 'maxItems' for groups and pins. Reviewed-by: Sam Shih <[email protected]> Signed-off-by: Peter Chiu <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
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Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml

Lines changed: 28 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,10 @@ patternProperties:
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"i2s" "audio" 62, 63, 64, 65
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"switch_int" "eth" 66
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"mdc_mdio" "eth" 67
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"wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83
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"wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
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"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
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84, 85
120124
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$ref: "/schemas/pinctrl/pinmux-node.yaml"
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properties:
@@ -234,7 +238,9 @@ patternProperties:
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then:
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properties:
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groups:
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enum: [wf_2g, wf_5g, wf_dbdc]
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items:
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enum: [wf_2g, wf_5g, wf_dbdc]
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maxItems: 3
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'.*conf.*':
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type: object
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additionalProperties: false
@@ -248,25 +254,27 @@ patternProperties:
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An array of strings. Each string contains the name of a pin.
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There is no PIN 41 to PIN 65 above on mt7686b, you can only use
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those pins on mt7986a.
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enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
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GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
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GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
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GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
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SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
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SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
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UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
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UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
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UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
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EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
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EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
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PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
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WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
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WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
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WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
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WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
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WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
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WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
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WF1_HB8]
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items:
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enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
259+
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
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GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
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GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
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SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
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SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
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UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
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UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
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UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
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EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
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EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
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PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
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WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
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WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
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WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
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WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
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WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
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WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
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WF1_HB8]
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maxItems: 101
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bias-disable: true
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