@@ -264,34 +264,34 @@ static __init void early_pci_serial_init(char *s)
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bar0 = read_pci_config (bus , slot , func , PCI_BASE_ADDRESS_0 );
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/*
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- * Verify it is a UART type device
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+ * Verify it is a 16550- UART type device
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*/
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if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM ) &&
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(classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL )) ||
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- (((classcode >> 8 ) & 0xff ) != 0x02 )) /* 16550 I/F at BAR0 */ {
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+ (((classcode >> 8 ) & 0xff ) != PCI_SERIAL_16550_COMPATIBLE )) {
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if (!force )
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return ;
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}
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/*
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* Determine if it is IO or memory mapped
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*/
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- if (bar0 & 0x01 ) {
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+ if (( bar0 & PCI_BASE_ADDRESS_SPACE ) == PCI_BASE_ADDRESS_SPACE_IO ) {
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/* it is IO mapped */
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serial_in = io_serial_in ;
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serial_out = io_serial_out ;
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- early_serial_base = bar0 & 0xfffffffc ;
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+ early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK ;
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write_pci_config (bus , slot , func , PCI_COMMAND ,
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- cmdreg |PCI_COMMAND_IO );
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+ cmdreg |PCI_COMMAND_IO );
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} else {
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/* It is memory mapped - assume 32-bit alignment */
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serial_in = mem32_serial_in ;
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serial_out = mem32_serial_out ;
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/* WARNING! assuming the address is always in the first 4G */
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early_serial_base =
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- (unsigned long )early_ioremap (bar0 & 0xfffffff0 , 0x10 );
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+ (unsigned long )early_ioremap (bar0 & PCI_BASE_ADDRESS_MEM_MASK , 0x10 );
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write_pci_config (bus , slot , func , PCI_COMMAND ,
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- cmdreg |PCI_COMMAND_MEMORY );
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+ cmdreg |PCI_COMMAND_MEMORY );
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}
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/*
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