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rafaeljwrafaeljw
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Merge branch 'pm-cpufreq'
Merge ARM cpufreq updates for 5.20-rc1. * pm-cpufreq: cpufreq: tegra194: Staticize struct tegra_cpufreq_soc instances dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6375 compatible dt-bindings: opp: Add msm8939 to the compatible list dt-bindings: opp: Add missing compat devices dt-bindings: opp: opp-v2-kryo-cpu: Fix example binding checks cpufreq: Change order of online() CB and policy->cpus modification cpufreq: qcom-hw: Remove deprecated irq_set_affinity_hint() call cpufreq: qcom-hw: Disable LMH irq when disabling policy cpufreq: qcom-hw: Reset cancel_throttle when policy is re-enabled cpufreq: qcom-cpufreq-hw: use HZ_PER_KHZ macro in units.h cpufreq: mediatek: fix error return code in mtk_cpu_dvfs_info_init()
2 parents c4f5a40 + 7912c9c commit c3f834d

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7 files changed

+38
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‎Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ properties:
2525
- description: v2 of CPUFREQ HW (EPSS)
2626
items:
2727
- enum:
28+
- qcom,sm6375-cpufreq-epss
2829
- qcom,sm8250-cpufreq-epss
2930
- const: qcom,cpufreq-epss
3031

‎Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,13 @@ select:
2222
compatible:
2323
contains:
2424
enum:
25+
- qcom,apq8064
26+
- qcom,apq8096
27+
- qcom,ipq8064
28+
- qcom,msm8939
29+
- qcom,msm8960
30+
- qcom,msm8974
31+
- qcom,msm8996
2532
- qcom,qcs404
2633
required:
2734
- compatible

‎Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -98,6 +98,8 @@ examples:
9898
capacity-dmips-mhz = <1024>;
9999
clocks = <&kryocc 0>;
100100
operating-points-v2 = <&cluster0_opp>;
101+
power-domains = <&cpr>;
102+
power-domain-names = "cpr";
101103
#cooling-cells = <2>;
102104
next-level-cache = <&L2_0>;
103105
L2_0: l2-cache {
@@ -115,6 +117,8 @@ examples:
115117
capacity-dmips-mhz = <1024>;
116118
clocks = <&kryocc 0>;
117119
operating-points-v2 = <&cluster0_opp>;
120+
power-domains = <&cpr>;
121+
power-domain-names = "cpr";
118122
#cooling-cells = <2>;
119123
next-level-cache = <&L2_0>;
120124
};
@@ -128,6 +132,8 @@ examples:
128132
capacity-dmips-mhz = <1024>;
129133
clocks = <&kryocc 1>;
130134
operating-points-v2 = <&cluster1_opp>;
135+
power-domains = <&cpr>;
136+
power-domain-names = "cpr";
131137
#cooling-cells = <2>;
132138
next-level-cache = <&L2_1>;
133139
L2_1: l2-cache {
@@ -145,6 +151,8 @@ examples:
145151
capacity-dmips-mhz = <1024>;
146152
clocks = <&kryocc 1>;
147153
operating-points-v2 = <&cluster1_opp>;
154+
power-domains = <&cpr>;
155+
power-domain-names = "cpr";
148156
#cooling-cells = <2>;
149157
next-level-cache = <&L2_1>;
150158
};
@@ -182,18 +190,21 @@ examples:
182190
opp-microvolt = <905000 905000 1140000>;
183191
opp-supported-hw = <0x7>;
184192
clock-latency-ns = <200000>;
193+
required-opps = <&cpr_opp1>;
185194
};
186195
opp-1401600000 {
187196
opp-hz = /bits/ 64 <1401600000>;
188197
opp-microvolt = <1140000 905000 1140000>;
189198
opp-supported-hw = <0x5>;
190199
clock-latency-ns = <200000>;
200+
required-opps = <&cpr_opp2>;
191201
};
192202
opp-1593600000 {
193203
opp-hz = /bits/ 64 <1593600000>;
194204
opp-microvolt = <1140000 905000 1140000>;
195205
opp-supported-hw = <0x1>;
196206
clock-latency-ns = <200000>;
207+
required-opps = <&cpr_opp3>;
197208
};
198209
};
199210
@@ -207,24 +218,28 @@ examples:
207218
opp-microvolt = <905000 905000 1140000>;
208219
opp-supported-hw = <0x7>;
209220
clock-latency-ns = <200000>;
221+
required-opps = <&cpr_opp1>;
210222
};
211223
opp-1804800000 {
212224
opp-hz = /bits/ 64 <1804800000>;
213225
opp-microvolt = <1140000 905000 1140000>;
214226
opp-supported-hw = <0x6>;
215227
clock-latency-ns = <200000>;
228+
required-opps = <&cpr_opp4>;
216229
};
217230
opp-1900800000 {
218231
opp-hz = /bits/ 64 <1900800000>;
219232
opp-microvolt = <1140000 905000 1140000>;
220233
opp-supported-hw = <0x4>;
221234
clock-latency-ns = <200000>;
235+
required-opps = <&cpr_opp5>;
222236
};
223237
opp-2150400000 {
224238
opp-hz = /bits/ 64 <2150400000>;
225239
opp-microvolt = <1140000 905000 1140000>;
226240
opp-supported-hw = <0x1>;
227241
clock-latency-ns = <200000>;
242+
required-opps = <&cpr_opp6>;
228243
};
229244
};
230245

‎drivers/cpufreq/cpufreq.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1348,15 +1348,15 @@ static int cpufreq_online(unsigned int cpu)
13481348
}
13491349

13501350
if (!new_policy && cpufreq_driver->online) {
1351+
/* Recover policy->cpus using related_cpus */
1352+
cpumask_copy(policy->cpus, policy->related_cpus);
1353+
13511354
ret = cpufreq_driver->online(policy);
13521355
if (ret) {
13531356
pr_debug("%s: %d: initialization failed\n", __func__,
13541357
__LINE__);
13551358
goto out_exit_policy;
13561359
}
1357-
1358-
/* Recover policy->cpus using related_cpus */
1359-
cpumask_copy(policy->cpus, policy->related_cpus);
13601360
} else {
13611361
cpumask_copy(policy->cpus, cpumask_of(cpu));
13621362

‎drivers/cpufreq/mediatek-cpufreq.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -478,6 +478,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
478478
if (info->soc_data->ccifreq_supported) {
479479
info->vproc_on_boot = regulator_get_voltage(info->proc_reg);
480480
if (info->vproc_on_boot < 0) {
481+
ret = info->vproc_on_boot;
481482
dev_err(info->cpu_dev,
482483
"invalid Vproc value: %d\n", info->vproc_on_boot);
483484
goto out_disable_inter_clock;

‎drivers/cpufreq/qcom-cpufreq-hw.c

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include <linux/pm_opp.h>
1616
#include <linux/slab.h>
1717
#include <linux/spinlock.h>
18+
#include <linux/units.h>
1819

1920
#define LUT_MAX_ENTRIES 40U
2021
#define LUT_SRC GENMASK(31, 30)
@@ -26,8 +27,6 @@
2627

2728
#define GT_IRQ_STATUS BIT(2)
2829

29-
#define HZ_PER_KHZ 1000
30-
3130
struct qcom_cpufreq_soc_data {
3231
u32 reg_enable;
3332
u32 reg_domain_state;
@@ -428,7 +427,7 @@ static int qcom_cpufreq_hw_lmh_init(struct cpufreq_policy *policy, int index)
428427
return 0;
429428
}
430429

431-
ret = irq_set_affinity_hint(data->throttle_irq, policy->cpus);
430+
ret = irq_set_affinity_and_hint(data->throttle_irq, policy->cpus);
432431
if (ret)
433432
dev_err(&pdev->dev, "Failed to set CPU affinity of %s[%d]\n",
434433
data->irq_name, data->throttle_irq);
@@ -445,7 +444,11 @@ static int qcom_cpufreq_hw_cpu_online(struct cpufreq_policy *policy)
445444
if (data->throttle_irq <= 0)
446445
return 0;
447446

448-
ret = irq_set_affinity_hint(data->throttle_irq, policy->cpus);
447+
mutex_lock(&data->throttle_lock);
448+
data->cancel_throttle = false;
449+
mutex_unlock(&data->throttle_lock);
450+
451+
ret = irq_set_affinity_and_hint(data->throttle_irq, policy->cpus);
449452
if (ret)
450453
dev_err(&pdev->dev, "Failed to set CPU affinity of %s[%d]\n",
451454
data->irq_name, data->throttle_irq);
@@ -465,7 +468,8 @@ static int qcom_cpufreq_hw_cpu_offline(struct cpufreq_policy *policy)
465468
mutex_unlock(&data->throttle_lock);
466469

467470
cancel_delayed_work_sync(&data->throttle_work);
468-
irq_set_affinity_hint(data->throttle_irq, NULL);
471+
irq_set_affinity_and_hint(data->throttle_irq, NULL);
472+
disable_irq_nosync(data->throttle_irq);
469473

470474
return 0;
471475
}

‎drivers/cpufreq/tegra194-cpufreq.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ static struct tegra_cpufreq_ops tegra234_cpufreq_ops = {
162162
.set_cpu_ndiv = tegra234_set_cpu_ndiv,
163163
};
164164

165-
const struct tegra_cpufreq_soc tegra234_cpufreq_soc = {
165+
static const struct tegra_cpufreq_soc tegra234_cpufreq_soc = {
166166
.ops = &tegra234_cpufreq_ops,
167167
.actmon_cntr_base = 0x9000,
168168
.maxcpus_per_cluster = 4,
@@ -430,7 +430,7 @@ static struct tegra_cpufreq_ops tegra194_cpufreq_ops = {
430430
.set_cpu_ndiv = tegra194_set_cpu_ndiv,
431431
};
432432

433-
const struct tegra_cpufreq_soc tegra194_cpufreq_soc = {
433+
static const struct tegra_cpufreq_soc tegra194_cpufreq_soc = {
434434
.ops = &tegra194_cpufreq_ops,
435435
.maxcpus_per_cluster = 2,
436436
};

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