@@ -9,26 +9,30 @@ include(joinpath("..", "testhelpers", "llvmpasses.jl"))
99
1010# COM: Float32
1111# CHECK: @japi1_prod_v_vT
12- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
13- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
12+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
13+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
14+ # CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
1415# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x float>
1516
1617# COM: Float64
1718# CHECK: @japi1_prod_v_vT
18- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
19- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
19+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
20+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
21+ # CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
2022# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x double>
2123
2224# COM: Int32
2325# CHECK: @japi1_prod_v_vT
24- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
25- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
26+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
27+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
28+ # CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
2629# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i32>
2730
2831# COM: Int64
2932# CHECK: @japi1_prod_v_vT
30- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
31- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
33+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
34+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
35+ # CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
3236# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i64>
3337
3438function prod_v_vT (R, x, y)
3943
4044# COM: Float32
4145# CHECK: @japi1_prod_vT_v
42- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
43- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
46+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
47+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
48+ # CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
4449# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x float>
4550
4651# COM: Float64
4752# CHECK: @japi1_prod_vT_v
48- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
49- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
53+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
54+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
55+ # CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
5056# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x double>
5157
5258# COM: Int32
5359# CHECK: @japi1_prod_vT_v
54- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
55- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
60+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
61+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
62+ # CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
5663# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i32>
5764
5865# COM: Int64
5966# CHECK: @japi1_prod_vT_v
60- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
61- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
67+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
68+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
69+ # CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
6270# CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i64>
6371
6472function prod_vT_v (R, x, y)
6977
7078# COM: Float32
7179# CHECK: @japi1_prod_v_M_vT
72- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
73- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
74- # CHECK: store <[[VSCALE]][[VEC_FACTOR]] x float>
80+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
81+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x float>
82+ # XFAIL-CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x float>
83+ # XFAIL-CHECK: store <[[VSCALE]][[VEC_FACTOR]] x float>
7584
7685# COM: Float64
7786# CHECK: @japi1_prod_v_M_vT
78- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
79- # CHECK: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
80- # CHECK: store <[[VSCALE]][[VEC_FACTOR]] x double>
87+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
88+ # COM: fmul <[[VSCALE]][[VEC_FACTOR]] x double>
89+ # XFAIL-CHECK: fmul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x double>
90+ # XFAIL-CHECK: store <[[VSCALE]][[VEC_FACTOR]] x double>
8191
8292# COM: Int32
8393# CHECK: @japi1_prod_v_M_vT
84- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
85- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
86- # CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i32>
94+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
95+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i32>
96+ # XFAIL-CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i32>
97+ # XFAIL-CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i32>
8798
8899# COM: Int64
89100# CHECK: @japi1_prod_v_M_vT
90- # CHECK: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
91- # CHECK: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
92- # CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i64>
101+ # COM: load <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
102+ # COM: mul <[[VSCALE]][[VEC_FACTOR]] x i64>
103+ # XFAIL-CHECK: mul <[[VSCALE:(vscale x )?]][[VEC_FACTOR:[0-9]+]] x i64>
104+ # XFAIL-CHECK: store <[[VSCALE]][[VEC_FACTOR]] x i64>
93105
94106function prod_v_M_vT (R, x, M, y)
95107 R .= x .* M .* y'
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