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rc64
riscv64
1 parent 56c7c58 commit 96ad0a8Copy full SHA for 96ad0a8
base/binaryplatforms.jl
@@ -593,6 +593,7 @@ const arch_mapping = Dict(
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"armv7l" => "arm(v7l)?", # if we just see `arm-linux-gnueabihf`, we assume it's `armv7l`
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"armv6l" => "armv6l",
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"powerpc64le" => "p(ower)?pc64le",
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+ "riscv64" => "(rv64|riscv64)",
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)
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# Keep this in sync with `CPUID.ISAs_by_family`
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# These are the CPUID side of the microarchitectures targeted by GCC flags in BinaryBuilder.jl
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