Would Julia make the riscv architecture release?

[larryw3i]

riscv is becoming more and more popular(HiFive Unmatched, VisionFive Board etc.), would Julia make the riscv architecture release?

[vchuravy]

Supporting a new architecture is a lot of work and while we are certainly not opposed to supporting RISC-V, I don't think there are any plans in that direction.

Roughly what needs to happen is:

1. All dependencies need to work on RISC-V
2. https://binarybuilder.org support for RISC-V
3. LLVM support for RISC-V, especially ORCv2 and JITLink.
4. Porting the Julia runtime to RISC-V (ccall ABI, task switching implementation)
5. Infrastructure support for continuous integration and building releases.

I am probably forgetting some steps.

[VarLad]

@vchuravy Could you elaborate 4. a bit more and if possible, point to similar code for ARM support in the codebase?

[brett-mahar]

@VarLad you can search the Julia repository for (eg) ccall via github webpage https://github.com/JuliaLang/julia/search?q=ccall

It seems to be sprinkled throughout the code. So all the functions this ccall is invoking, would need to work on risc-v

(anyone feel free to correct me if I'm wrong, I'm just a hobby coder)

I'd also love to see Julia working on risc-v. With the new SBCs coming out from the Pinebook people and from SiFive, and all the risc-v CPUs going into automotive computers, it would certainly increase the Julia userbase :-)

[yuyichao]

A better term to search is _CPU_ARM_ or _CPU_AARCH64_. Most of the search result from ccall are generic (not arch specific). This (searching for the _CPU_* detection macros) was how I did the aarch64 port.

[brett-mahar]

riscv is becoming more and more popular(HiFive Unmatched, VisionFive Board etc.), would Julia make the riscv architecture release?

It might be worth asking the RISC-V foundation https://riscv.org/about/

Maybe they could fund something...

[inkydragon]

Some progress by @alexfanqi: https://github.com/alexfanqi/julia/blob/master/doc/src/devdocs/build/riscv.md