Skip to content

Commit 12b357c

Browse files
committed
Rerun benchmarks after reordering or u2 and u1 lowering. Seems to have caused performance regressions, even though the change sounds like it should be an improvement.
1 parent 1c128b7 commit 12b357c

21 files changed

+22
-20
lines changed

benchmark/loadsharedlibs.jl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ const LIBDIRECTCALLJIT = joinpath(LOOPVECBENCHDIR, "libdcjtest.so")
1616
# requires Clang with polly to build
1717
cfile = joinpath(LOOPVECBENCHDIR, "looptests.c")
1818
if !isfile(LIBCTEST) || mtime(cfile) > mtime(LIBCTEST)
19-
run(`clang -Ofast -march=native -mprefer-vector-width=$(8REGISTER_SIZE) -lm -shared -fPIC $cfile -o $LIBCTEST`)
19+
run(`/usr/bin/clang -Ofast -march=native -mprefer-vector-width=$(8REGISTER_SIZE) -lm -shared -fPIC $cfile -o $LIBCTEST`)
2020
# run(`/usr/local/bin/clang -Ofast -march=native -mprefer-vector-width=$(8REGISTER_SIZE) -lm -mllvm -polly -mllvm -polly-vectorizer=stripmine -shared -fPIC $cfile -o $LIBCTEST`)
2121
end
2222
if !isfile(LIBICTEST) || mtime(cfile) > mtime(LIBICTEST)

benchmark/looptests.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -236,7 +236,7 @@ double randomaccess(double* restrict P, long* restrict basis, double* restrict c
236236
}
237237
return p;
238238
}
239-
double logdettriangle(double* T, long N){
239+
double logdettriangle(double* restrict T, long N){
240240
double ld = 0;
241241
for (long n = 0; n < N; n++){
242242
ld += log(T[n + n*N]);

docs/src/assets/bench_AmulB_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_AmulBt_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_Amulvb_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_AplusAt_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_AtmulB_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_AtmulBt_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_Atmulvb_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

docs/src/assets/bench_aplusBc_v1.svg

Lines changed: 1 addition & 1 deletion
Loading

0 commit comments

Comments
 (0)