Vitis

WORK IN PROGRESS

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This page describes the current state of PipelineC+Xilinx Vitis integration.

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Begins with Bartus's work in https://github.com/JulianKemmerer/PipelineC/pull/127

The files discussed here are in the PipelineC repo at examples/vitis_import.

Files

• axis.c: PipelineC main file
  • IO and CTRL
    • W/ FIFO
  • Pipeline

Build

These scripts are used to generate Vitis HLS IP's that transfer data to/from PipelineC generated IP. 
Streaming interfaces are used as communication channel. PipelineC IP is packaged as .XO and connected with Vitis at linking stage.

Tested with Vivado/Vitis tools version 2022.2

Source Xilinx env first -> for example: "source /tools/Xilinx/Vitis/2022.2/settings64.sh"
Use build_all.sh to build and run example project.
If you wish to build for hw change target in build_all.sh script.

Software Emulation

sw_emu

Hardware Emulation (Simulation)

hw_emu

Hardware Test

TODO