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MrSidimsMrSidims
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[NFC] Remove tbaa metadata from the test (#2503)
We don't need it here Signed-off-by: Sidorov, Dmitry <[email protected]>
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‎test/extensions/INTEL/SPV_INTEL_fpga_reg/IntelFPGAReg.ll‎

Lines changed: 37 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
122122
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
123123
entry:
124124
%this.addr = alloca ptr addrspace(4), align 8
125-
store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
125+
store ptr addrspace(4) %this, ptr %this.addr, align 8
126126
%this1 = load ptr addrspace(4), ptr %this.addr, align 8
127127
call spir_func void @_Z3foov()
128128
ret void
@@ -161,73 +161,73 @@ entry:
161161
%ap = alloca ptr addrspace(4), align 8
162162
%bp = alloca ptr addrspace(4), align 8
163163
call void @llvm.lifetime.start.p0(i64 4, ptr %a) #4
164-
store i32 123, ptr %a, align 4, !tbaa !9
164+
store i32 123, ptr %a, align 4
165165
call void @llvm.lifetime.start.p0(i64 4, ptr %myA) #4
166-
store i32 321, ptr %myA, align 4, !tbaa !9
166+
store i32 321, ptr %myA, align 4
167167
call void @llvm.lifetime.start.p0(i64 4, ptr %b) #4
168-
%0 = load i32, ptr %a, align 4, !tbaa !9
168+
%0 = load i32, ptr %a, align 4
169169
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
170170
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR]]
171171
%1 = call i32 @llvm.annotation.i32.p1(i32 %0, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 35)
172-
store i32 %1, ptr %b, align 4, !tbaa !9
172+
store i32 %1, ptr %b, align 4
173173
call void @llvm.lifetime.start.p0(i64 4, ptr %myB) #4
174-
%2 = load i32, ptr %myA, align 4, !tbaa !9
174+
%2 = load i32, ptr %myA, align 4
175175
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
176176
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR1]]
177177
%3 = call i32 @llvm.annotation.i32.p1(i32 %2, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 39)
178-
store i32 %3, ptr %myB, align 4, !tbaa !9
178+
store i32 %3, ptr %myB, align 4
179179
call void @llvm.lifetime.start.p0(i64 4, ptr %c) #4
180180
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
181181
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR2]]
182182
%4 = call i32 @llvm.annotation.i32.p1(i32 1073741824, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 43)
183183
%5 = bitcast i32 %4 to float
184184
%conv = fptosi float %5 to i32
185-
store i32 %conv, ptr %c, align 4, !tbaa !9
185+
store i32 %conv, ptr %c, align 4
186186
call void @llvm.lifetime.start.p0(i64 4, ptr %d) #4
187-
%6 = load i32, ptr %b, align 4, !tbaa !9
187+
%6 = load i32, ptr %b, align 4
188188
%add = add nsw i32 %6, 12
189189
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
190190
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR3]]
191191
%7 = call i32 @llvm.annotation.i32.p1(i32 %add, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 48)
192192
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
193193
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR4]]
194194
%8 = call i32 @llvm.annotation.i32.p1(i32 %7, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 48)
195-
store i32 %8, ptr %d, align 4, !tbaa !9
195+
store i32 %8, ptr %d, align 4
196196
call void @llvm.lifetime.start.p0(i64 4, ptr %e) #4
197-
%9 = load i32, ptr %a, align 4, !tbaa !9
198-
%10 = load i32, ptr %b, align 4, !tbaa !9
197+
%9 = load i32, ptr %a, align 4
198+
%10 = load i32, ptr %b, align 4
199199
%add1 = add nsw i32 %9, %10
200200
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
201201
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR5]]
202202
%11 = call i32 @llvm.annotation.i32.p1(i32 %add1, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 54)
203203
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
204204
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR6]]
205205
%12 = call i32 @llvm.annotation.i32.p1(i32 %11, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 54)
206-
store i32 %12, ptr %e, align 4, !tbaa !9
206+
store i32 %12, ptr %e, align 4
207207
call void @llvm.lifetime.start.p0(i64 4, ptr %f) #4
208-
%13 = load i32, ptr %a, align 4, !tbaa !9
208+
%13 = load i32, ptr %a, align 4
209209
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
210210
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR7]]
211211
%14 = call i32 @llvm.annotation.i32.p1(i32 %13, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 62)
212-
store i32 %14, ptr %f, align 4, !tbaa !9
212+
store i32 %14, ptr %f, align 4
213213
call void @llvm.lifetime.start.p0(i64 8, ptr %i) #4
214214
call void @llvm.memcpy.p0.p1.i64(ptr align 4 %i, ptr addrspace(1) align 4 @__const._Z3foov.i, i64 8, i1 false)
215215
call void @llvm.lifetime.start.p0(i64 8, ptr %i2) #4
216-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %i2, ptr align 4 %i, i64 8, i1 false), !tbaa.struct !11
216+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %i2, ptr align 4 %i, i64 8, i1 false)
217217
call void @llvm.lifetime.start.p0(i64 8, ptr %ii) #4
218-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp, ptr align 4 %i, i64 8, i1 false), !tbaa.struct !11
218+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp, ptr align 4 %i, i64 8, i1 false)
219219
; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
220220
; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST1:[a-z0-9]+]], ptr @[[STR8]]
221221
%15 = call ptr @llvm.ptr.annotation.p0.p1(ptr %agg-temp, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 69, ptr addrspace(1) null)
222222
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ii, ptr align 4 %15, i64 8, i1 false)
223223
call void @llvm.lifetime.start.p0(i64 8, ptr %iii) #4
224224
call void @llvm.lifetime.start.p0(i64 8, ptr %ref.tmp) #4
225-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp2, ptr align 4 %ii, i64 8, i1 false), !tbaa.struct !11
225+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp2, ptr align 4 %ii, i64 8, i1 false)
226226
; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
227227
; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST2:[a-z0-9]+]], ptr @[[STR9]]
228228
%16 = call ptr @llvm.ptr.annotation.p0.p1(ptr %agg-temp2, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 80, ptr addrspace(1) null)
229229
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ref.tmp, ptr align 4 %16, i64 8, i1 false)
230-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %iii, ptr align 4 %ref.tmp, i64 8, i1 false), !tbaa.struct !11
230+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %iii, ptr align 4 %ref.tmp, i64 8, i1 false)
231231
call void @llvm.lifetime.end.p0(i64 8, ptr %ref.tmp) #4
232232
call void @llvm.lifetime.start.p0(i64 8, ptr %iiii) #4
233233
%17 = ptrtoint ptr %iii to i64
@@ -236,46 +236,46 @@ entry:
236236
%18 = call i64 @llvm.annotation.i64(i64 %17, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 94)
237237
%19 = inttoptr i64 %18 to ptr
238238
%20 = addrspacecast ptr %19 to ptr addrspace(4)
239-
store ptr addrspace(4) %20, ptr %iiii, align 8, !tbaa !5
239+
store ptr addrspace(4) %20, ptr %iiii, align 8
240240
call void @llvm.lifetime.start.p0(i64 4, ptr %u1) #4
241241
call void @llvm.memcpy.p0.p1.i64(ptr align 4 %u1, ptr addrspace(1) align 4 @__const._Z3foov.u1, i64 4, i1 false)
242242
call void @llvm.lifetime.start.p0(i64 4, ptr %u2) #4
243243
call void @llvm.lifetime.start.p0(i64 8, ptr %u3) #4
244244
call void @llvm.lifetime.start.p0(i64 4, ptr %ref.tmp3) #4
245-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp4, ptr align 4 %u1, i64 4, i1 false), !tbaa.struct !14
245+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp4, ptr align 4 %u1, i64 4, i1 false)
246246
; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
247247
; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST4:[a-z0-9]+]], ptr @[[STR11]]
248248
%21 = call ptr @llvm.ptr.annotation.p0.p1(ptr %agg-temp4, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 103, ptr addrspace(1) null)
249249
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ref.tmp3, ptr align 4 %21, i64 8, i1 false)
250-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %u2, ptr align 4 %ref.tmp3, i64 4, i1 false), !tbaa.struct !14
250+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %u2, ptr align 4 %ref.tmp3, i64 4, i1 false)
251251
call void @llvm.lifetime.end.p0(i64 4, ptr %ref.tmp3) #4
252252
%22 = ptrtoint ptr %u2 to i64
253253
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT64]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
254254
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i64 @llvm.annotation.i64.p0(i64 {{[%a-z0-9]+}}, ptr @[[STR12]]
255255
%23 = call i64 @llvm.annotation.i64(i64 %22, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 117)
256256
%24 = inttoptr i64 %23 to ptr
257257
%25 = addrspacecast ptr %24 to ptr addrspace(4)
258-
store ptr addrspace(4) %25, ptr %u3, align 8, !tbaa !5
258+
store ptr addrspace(4) %25, ptr %u3, align 8
259259
call void @llvm.lifetime.start.p0(i64 4, ptr %ca) #4
260260
%26 = addrspacecast ptr %ca to ptr addrspace(4)
261261
call spir_func void @_ZN1AC1Ei(ptr addrspace(4) %26, i32 213)
262262
call void @llvm.lifetime.start.p0(i64 4, ptr %cb) #4
263-
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp5, ptr align 4 %ca, i64 4, i1 false), !tbaa.struct !16
263+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp5, ptr align 4 %ca, i64 4, i1 false)
264264
; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
265265
; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST5:[a-z0-9]+]], ptr @[[STR13]]
266266
%27 = call ptr @llvm.ptr.annotation.p0.p1(ptr %agg-temp5, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 125, ptr addrspace(1) null)
267267
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %cb, ptr align 4 %27, i64 8, i1 false)
268268
call void @llvm.lifetime.start.p0(i64 8, ptr %ap) #4
269269
%28 = addrspacecast ptr %a to ptr addrspace(4)
270-
store ptr addrspace(4) %28, ptr %ap, align 8, !tbaa !5
270+
store ptr addrspace(4) %28, ptr %ap, align 8
271271
call void @llvm.lifetime.start.p0(i64 8, ptr %bp) #4
272-
%29 = load ptr addrspace(4), ptr %ap, align 8, !tbaa !5
272+
%29 = load ptr addrspace(4), ptr %ap, align 8
273273
%30 = ptrtoint ptr addrspace(4) %29 to i64
274274
; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT64]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
275275
; CHECK-LLVM-DAG: %{{[0-9]+}} = call i64 @llvm.annotation.i64.p0(i64 {{[%a-z0-9]+}}, ptr @[[STR14]]
276276
%31 = call i64 @llvm.annotation.i64(i64 %30, ptr addrspace(1) @.str, ptr addrspace(1) @.str.1, i32 137)
277277
%32 = inttoptr i64 %31 to ptr addrspace(4)
278-
store ptr addrspace(4) %32, ptr %bp, align 8, !tbaa !5
278+
store ptr addrspace(4) %32, ptr %bp, align 8
279279
call void @llvm.lifetime.end.p0(i64 8, ptr %bp) #4
280280
call void @llvm.lifetime.end.p0(i64 8, ptr %ap) #4
281281
call void @llvm.lifetime.end.p0(i64 4, ptr %cb) #4
@@ -322,10 +322,10 @@ define linkonce_odr spir_func void @_ZN1AC1Ei(ptr addrspace(4) %this, i32 %a) un
322322
entry:
323323
%this.addr = alloca ptr addrspace(4), align 8
324324
%a.addr = alloca i32, align 4
325-
store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
326-
store i32 %a, ptr %a.addr, align 4, !tbaa !9
325+
store ptr addrspace(4) %this, ptr %this.addr, align 8
326+
store i32 %a, ptr %a.addr, align 4
327327
%this1 = load ptr addrspace(4), ptr %this.addr, align 8
328-
%0 = load i32, ptr %a.addr, align 4, !tbaa !9
328+
%0 = load i32, ptr %a.addr, align 4
329329
call spir_func void @_ZN1AC2Ei(ptr addrspace(4) %this1, i32 %0)
330330
ret void
331331
}
@@ -335,11 +335,11 @@ define linkonce_odr spir_func void @_ZN1AC2Ei(ptr addrspace(4) %this, i32 %a) un
335335
entry:
336336
%this.addr = alloca ptr addrspace(4), align 8
337337
%a.addr = alloca i32, align 4
338-
store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
339-
store i32 %a, ptr %a.addr, align 4, !tbaa !9
338+
store ptr addrspace(4) %this, ptr %this.addr, align 8
339+
store i32 %a, ptr %a.addr, align 4
340340
%this1 = load ptr addrspace(4), ptr %this.addr, align 8
341-
%0 = load i32, ptr %a.addr, align 4, !tbaa !9
342-
store i32 %0, ptr addrspace(4) %this1, align 4, !tbaa !17
341+
%0 = load i32, ptr %a.addr, align 4
342+
store i32 %0, ptr addrspace(4) %this1, align 4
343343
ret void
344344
}
345345

@@ -359,17 +359,6 @@ attributes #4 = { nounwind }
359359
!2 = !{i32 4, i32 100000}
360360
!3 = !{!"clang version 9.0.0"}
361361
!4 = !{}
362-
!5 = !{!6, !6, i64 0}
363-
!6 = !{!"any pointer", !7, i64 0}
364-
!7 = !{!"omnipotent char", !8, i64 0}
365-
!8 = !{!"Simple C++ TBAA"}
366-
!9 = !{!10, !10, i64 0}
367-
!10 = !{!"int", !7, i64 0}
368-
!11 = !{i64 0, i64 4, !9, i64 4, i64 4, !12}
369-
!12 = !{!13, !13, i64 0}
370-
!13 = !{!"float", !7, i64 0}
371-
!14 = !{i64 0, i64 4, !9, i64 0, i64 4, !15}
372-
!15 = !{!7, !7, i64 0}
373-
!16 = !{i64 0, i64 4, !9}
374-
!17 = !{!18, !10, i64 0}
375-
!18 = !{!"_ZTS1A", !10, i64 0}
362+
!5 = !{!"any pointer", !6, i64 0}
363+
!6 = !{!"omnipotent char", !7, i64 0}
364+
!7 = !{!"Simple C++ TBAA"}

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