This repository contains the VHDL implementation of a ROM-less Direct Digital Frequency Synthesizer (DDFS) designed for high-speed calculation of the arctan function. This project was developed as a final assignment to fulfill the requirements for a bachelor's degree in Electrical Engineering.
The primary goal is to create an efficient computational unit for real-time applications like the Field-Oriented Control (FOC) of electric motors, where fast and accurate rotor angle calculation is critical.
Instead of using a conventional, memory-intensive Look-Up Table (LUT), this architecture employs a segmented quadratic polynomial approximation method. The design is fully pipelined to ensure high throughput and low resource utilization on an Artix-7 FPGA target.
NB: ROMLESS DDFS is in a folder called Fast_Atan_Final, while "DDFS_sederhana" is just a regular DDFS that I used for practice as well as my initial understanding of what DDFS is.