77#ifndef ZEPHYR_PINNAMES_H
88#define ZEPHYR_PINNAMES_H
99
10- #ifdef __cplusplus
11- extern "C" {
12- #endif
13-
14- #define DUAL_PAD 0x800
1510
1611typedef enum {
1712 PH_15 = 0 ,
@@ -94,15 +89,6 @@ typedef enum {
9489 PJ_9 = 77 ,
9590 PJ_10 = 78 ,
9691
97- WL_REG_ON = PJ_1 ,
98- WL_HOST_WAKE = PJ_5 ,
99- WL_SDIO_0 = PC_8 ,
100- WL_SDIO_1 = PC_9 ,
101- WL_SDIO_2 = PC_10 ,
102- WL_SDIO_3 = PC_11 ,
103- WL_SDIO_CMD = PD_2 ,
104- WL_SDIO_CLK = PC_12 ,
105-
10692 /**** ADC internal channels ****/
10793
10894 ADC_TEMP = 0xF0 , // Internal pin virtual value
@@ -113,94 +99,11 @@ typedef enum {
11399 LED_RED = PK_5 , //Red
114100 LED_GREEN = PK_6 , //Green
115101 LED_BLUE = PK_7 , //Blue
116-
117- CYBSP_BT_UART_RX = PF_6 ,
118- CYBSP_BT_UART_TX = PA_15 ,
119- CYBSP_BT_UART_RTS = PF_8 ,
120- CYBSP_BT_UART_CTS = PF_9 ,
121-
122- CYBSP_BT_POWER = PJ_12 ,
123- CYBSP_BT_HOST_WAKE = PJ_13 ,
124- CYBSP_BT_DEVICE_WAKE = PJ_14 ,
125-
126- /**** QSPI FLASH pins ****/
127- QSPI_FLASH1_IO0 = PD_11 ,
128- QSPI_FLASH1_IO1 = PD_12 ,
129- QSPI_FLASH1_IO2 = PF_7 ,
130- QSPI_FLASH1_IO3 = PD_13 ,
131- QSPI_FLASH1_SCK = PF_10 ,
132- QSPI_FLASH1_CSN = PG_6 ,
133-
134- /**** USB FS pins ****/
135- USB_OTG_FS_DM = PA_11 ,
136- USB_OTG_FS_DP = PA_12 ,
137- USB_OTG_FS_ID = PA_10 ,
138- USB_OTG_FS_SOF = PA_8 ,
139- USB_OTG_FS_VBUS = PA_9 ,
140-
141- /**** USB HS pins ****/
142- USB_OTG_HS_DM = PB_14 ,
143- USB_OTG_HS_DP = PB_15 ,
144- USB_OTG_HS_ID = PB_12 ,
145- USB_OTG_HS_SOF = PA_4 ,
146- USB_OTG_HS_ULPI_CK = PA_5 ,
147- USB_OTG_HS_ULPI_D0 = PA_3 ,
148- USB_OTG_HS_ULPI_D1 = PB_0 ,
149- USB_OTG_HS_ULPI_D2 = PB_1 ,
150- USB_OTG_HS_ULPI_D3 = PB_10 ,
151- USB_OTG_HS_ULPI_D4 = PB_11 ,
152- USB_OTG_HS_ULPI_D5 = PB_12 ,
153- USB_OTG_HS_ULPI_D6 = PB_13 ,
154- USB_OTG_HS_ULPI_D7 = PB_5 ,
155- USB_OTG_HS_ULPI_DIR = PC_2 ,
156- USB_OTG_HS_ULPI_NXT = PC_3 ,
157- USB_OTG_HS_ULPI_STP = PC_0 ,
158- USB_OTG_HS_VBUS = PB_13 ,
159-
160- /**** ETHERNET pins ****/
161- ETH_MDC = PC_1 ,
162- ETH_MDIO = PA_2 ,
163- ETH_CRS_DV = PA_7 ,
164- ETH_REF_CLK = PA_1 ,
165- ETH_RXD0 = PC_4 ,
166- ETH_RXD1 = PC_5 ,
167- ETH_RX_CLK = PA_1 ,
168- ETH_TXD0 = PG_13 ,
169- ETH_TXD1 = PG_12 ,
170- ETH_TX_EN = PG_11 ,
171-
172- /**** OSCILLATOR pins ****/
173- RCC_OSC32_IN = PC_14 ,
174- RCC_OSC32_OUT = PC_15 ,
175- RCC_OSC_IN = PH_0 ,
176- RCC_OSC_OUT = PH_1 ,
177-
178- /**** DEBUG pins ****/
179- SYS_JTCK_SWCLK = PA_14 ,
180- SYS_JTDI = PA_15 ,
181- SYS_JTDO_SWO = PB_3 ,
182- SYS_JTMS_SWDIO = PA_13 ,
183- SYS_JTRST = PB_4 ,
184- SYS_PVD_IN = PB_7 ,
185- SYS_TRACECLK = PE_2 ,
186- SYS_TRACED0 = PE_3 ,
187- SYS_TRACED0_ALT0 = PC_1 ,
188- SYS_TRACED0_ALT1 = PG_13 ,
189- SYS_TRACED1 = PE_4 ,
190- SYS_TRACED1_ALT0 = PC_8 ,
191- SYS_TRACED1_ALT1 = PG_14 ,
192- SYS_TRACED2 = PE_5 ,
193- SYS_TRACED2_ALT0 = PD_2 ,
194- SYS_TRACED3 = PE_6 ,
195- SYS_TRACED3_ALT0 = PC_12 ,
196- SYS_TRGIO = PC_7 ,
197- SYS_WKUP0 = PA_0 ,
198- SYS_WKUP1 = PA_2 ,
199- SYS_WKUP2 = PC_13 ,
200- SYS_WKUP5 = PC_1 ,
201-
202102 // Not connected
203103 NC = (int )0xFFFFFFFF
204104} PinName ;
205105
106+ inline pin_size_t PinNameToIndex (PinName pn ) {return (pin_size_t )pn ;}
107+ inline PinName digitalPinToPinName (pin_size_t pin ) {return (PinName )pin ;}
108+
206109#endif
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