APIC.yml

- short_name: APIC
  long_name: LOCAL_APIC
  children_name_with_prefix: APIC
  short_description: Advanced Programmable Interrupt Controller (APIC)
  long_description: |
    Software interacts with the local APIC by reading
    and writing its registers. APIC registers are memory-mapped to a 4-KByte region of the processor’s physical
    address space with an initial starting address of FEE00000H. For correct APIC operation, this address space must
    be mapped to an area of memory that has been designated as strong uncacheable (UC).
  remarks: |
    Registers are 32 bits,
    64 bits, or 256 bits in width; all are aligned on 128-bit boundaries. All 32-bit registers should be accessed using
    128-bit aligned 32-bit loads or stores. Some processors may support loads and stores of less than 32 bits to some
    of the APIC registers. This is model specific behavior and is not guaranteed to work on all processors. Any
    FP/MMX/SSE access to an APIC register, or any access that touches bytes 4 through 15 of an APIC register may
    cause undefined behavior and must not be executed. This undefined behavior could include hangs, incorrect results
    or unexpected exceptions, including machine checks, and may vary between implementations. Wider registers
    (64-bit or 256-bit) must be accessed using multiple 32-bit loads or stores, with all accesses being 128-bit aligned.
  type: group
  size: 32
  reference: Vol3A[10.4.1(The Local APIC Block Diagram)]
  fields:
  - value: 0xFEE00000
    short_name: BASE
    long_name: BASE_ADDRESS
    description: Local APIC Base Address.
    remarks: Reserved.

  #
  # Offsets.
  #

  - value: 0x20
    short_name: ID
    long_name: ID_REGISTER
    alternative_name: ID
    description: Local APIC ID Register.
    access: Read/Write

  - value: 0x30
    short_name: VERSION
    long_name: VERSION_REGISTER
    alternative_name: VERSION
    description: Local APIC Version Register.
    access: Read Only

  - value: 0x80
    short_name: TPR
    long_name: TASK_PRIORITY_REGISTER
    alternative_name: TASK_PRIORITY
    description: Task Priority Register (TPR).
    access: Read/Write

  - value: 0x90
    short_name: APR
    long_name: ARBITRATION_PRIORITY_REGISTER
    alternative_name: ARBITRATION_PRIORITY
    description: Arbitration Priority Register (APR).
    access: Read Only

  - value: 0xA0
    short_name: PPR
    long_name: PROCESSOR_PRIORITY_REGISTER
    alternative_name: PROCESSOR_PRIORITY
    description: Processor Priority Register (PPR).
    access: Read Only

  - value: 0xB0
    short_name: EOI
    long_name: EOI_REGISTER
    alternative_name: EOI
    description: EOI Register.
    access: Write Only

  - value: 0xC0
    short_name: REMOTE_READ
    long_name: REMOTE_READ_REGISTER
    alternative_name: REMOTE_READ
    description: Remote Read Register (RRD).
    access: Read Only

  - value: 0xD0
    short_name: LOGICAL_DESTINATION
    long_name: LOGICAL_DESTINATION_REGISTER
    alternative_name: LOGICAL_DESTINATION
    description: Logical Destination Register.
    access: Read/Write

  - value: 0xE0
    short_name: DESTINATION_FORMAT
    long_name: DESTINATION_FORMAT_REGISTER
    alternative_name: DESTINATION_FORMAT
    description: Destination Format Register.
    access: Read/Write
    see: Vol3A[10.6.2.2(Logical Destination Mode)]

  - value: 0xF0
    short_name: SIV
    long_name: SPURIOUS_INTERRUPT_VECTOR_REGISTER
    alternative_name: SPURIOUS_INTERRUPT_VECTOR
    description: Spurious Interrupt Vector Register.
    access: Read/Write
    see: Vol3A[10.9(SPURIOUS INTERRUPT)]

  - value: 0x100
    short_name: ISR_31_0
    long_name: IN_SERVICE_REGISTER_BITS_31_0
    alternative_name: IN_SERVICE_BITS_31_0
    description: In-Service Register (ISR); bits 31:0.
    access: Read Only

  - value: 0x110
    short_name: ISR_63_32
    long_name: IN_SERVICE_REGISTER_BITS_63_32
    alternative_name: IN_SERVICE_BITS_63_32
    description: In-Service Register (ISR); bits 63:32.
    access: Read Only

  - value: 0x120
    short_name: ISR_95_64
    long_name: IN_SERVICE_REGISTER_BITS_95_64
    alternative_name: IN_SERVICE_BITS_95_64
    description: In-Service Register (ISR); bits 95:64.
    access: Read Only

  - value: 0x130
    short_name: ISR_127_96
    long_name: IN_SERVICE_REGISTER_BITS_127_96
    alternative_name: IN_SERVICE_BITS_127_96
    description: In-Service Register (ISR); bits 127:96.
    access: Read Only

  - value: 0x140
    short_name: ISR_159_128
    long_name: IN_SERVICE_REGISTER_BITS_159_128
    alternative_name: IN_SERVICE_BITS_159_128
    description: In-Service Register (ISR); bits 159:128.
    access: Read Only

  - value: 0x150
    short_name: ISR_191_160
    long_name: IN_SERVICE_REGISTER_BITS_191_160
    alternative_name: IN_SERVICE_BITS_191_160
    description: In-Service Register (ISR); bits 191:160.
    access: Read Only

  - value: 0x160
    short_name: ISR_223_192
    long_name: IN_SERVICE_REGISTER_BITS_223_192
    alternative_name: IN_SERVICE_BITS_223_192
    description: In-Service Register (ISR); bits 223:192.
    access: Read Only

  - value: 0x170
    short_name: ISR_255_224
    long_name: IN_SERVICE_REGISTER_BITS_255_224
    alternative_name: IN_SERVICE_BITS_255_224
    description: In-Service Register (ISR); bits 255:224.
    access: Read Only

  - value: 0x180
    short_name: TMR_31_0
    long_name: TRIGGER_MODE_REGISTER_BITS_31_0
    alternative_name: TRIGGER_MODE_BITS_31_0
    description: Trigger Mode Register (TMR); bits 31:0.
    access: Read Only

  - value: 0x190
    short_name: TMR_63_32
    long_name: TRIGGER_MODE_REGISTER_BITS_63_32
    alternative_name: TRIGGER_MODE_BITS_63_32
    description: Trigger Mode Register (TMR); bits 63:32.
    access: Read Only

  - value: 0x1A0
    short_name: TMR_95_64
    long_name: TRIGGER_MODE_REGISTER_BITS_95_64
    alternative_name: TRIGGER_MODE_BITS_95_64
    description: Trigger Mode Register (TMR); bits 95:64.
    access: Read Only

  - value: 0x1B0
    short_name: TMR_127_96
    long_name: TRIGGER_MODE_REGISTER_BITS_127_96
    alternative_name: TRIGGER_MODE_BITS_127_96
    description: Trigger Mode Register (TMR); bits 127:96.
    access: Read Only

  - value: 0x1C0
    short_name: TMR_159_128
    long_name: TRIGGER_MODE_REGISTER_BITS_159_128
    alternative_name: TRIGGER_MODE_BITS_159_128
    description: Trigger Mode Register (TMR); bits 159:128.
    access: Read Only

  - value: 0x1D0
    short_name: TMR_191_160
    long_name: TRIGGER_MODE_REGISTER_BITS_191_160
    alternative_name: TRIGGER_MODE_BITS_191_160
    description: Trigger Mode Register (TMR); bits 191:160.
    access: Read Only

  - value: 0x1E0
    short_name: TMR_223_192
    long_name: TRIGGER_MODE_REGISTER_BITS_223_192
    alternative_name: TRIGGER_MODE_BITS_223_192
    description: Trigger Mode Register (TMR); bits 223:192.
    access: Read Only

  - value: 0x1F0
    short_name: TMR_255_224
    long_name: TRIGGER_MODE_REGISTER_BITS_255_224
    alternative_name: TRIGGER_MODE_BITS_255_224
    description: Trigger Mode Register (TMR); bits 255:224.
    access: Read Only

  - value: 0x200
    short_name: IRR_31_0
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_31_0
    alternative_name: INTERRUPT_REQUEST_BITS_31_0
    description: Interrupt Request Register (IRR); bits 31:0.
    access: Read Only

  - value: 0x210
    short_name: IRR_63_32
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_63_32
    alternative_name: INTERRUPT_REQUEST_BITS_63_32
    description: Interrupt Request Register (IRR); bits 63:32.
    access: Read Only

  - value: 0x220
    short_name: IRR_95_64
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_95_64
    alternative_name: INTERRUPT_REQUEST_BITS_95_64
    description: Interrupt Request Register (IRR); bits 95:64.
    access: Read Only

  - value: 0x230
    short_name: IRR_127_96
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_127_96
    alternative_name: INTERRUPT_REQUEST_BITS_127_96
    description: Interrupt Request Register (IRR); bits 127:96.
    access: Read Only

  - value: 0x240
    short_name: IRR_159_128
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_159_128
    alternative_name: INTERRUPT_REQUEST_BITS_159_128
    description: Interrupt Request Register (IRR); bits 159:128.
    access: Read Only

  - value: 0x250
    short_name: IRR_191_160
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_191_160
    alternative_name: INTERRUPT_REQUEST_BITS_191_160
    description: Interrupt Request Register (IRR); bits 191:160.
    access: Read Only

  - value: 0x260
    short_name: IRR_223_192
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_223_192
    alternative_name: INTERRUPT_REQUEST_BITS_223_192
    description: Interrupt Request Register (IRR); bits 223:192.
    access: Read Only

  - value: 0x270
    short_name: IRR_255_224
    long_name: INTERRUPT_REQUEST_REGISTER_BITS_255_224
    alternative_name: INTERRUPT_REQUEST_BITS_255_224
    description: Interrupt Request Register (IRR); bits 255:224.
    access: Read Only

  - value: 0x280
    short_name: ERROR_STATUS
    long_name: ERROR_STATUS_REGISTER
    alternative_name: ERROR_STATUS
    description: Error Status Register.
    access: Read Only

  - value: 0x2F0
    short_name: CMCI
    long_name: LVT_CORRECTED_MACHINE_CHECK_INTERRUPT_REGISTER
    alternative_name: LVT_CORRECTED_MACHINE_CHECK_INTERRUPT
    description: LVT Corrected Machine Check Interrupt (CMCI) Register.
    access: Read/Write

  - value: 0x300
    short_name: ICR_0_31
    long_name: INTERRUPT_COMMAND_REGISTER_BITS_0_31
    alternative_name: INTERRUPT_COMMAND_BITS_0_31
    description: Interrupt Command Register (ICR); bits 0-31.
    access: Read/Write

  - value: 0x310
    short_name: ICR_32_63
    long_name: INTERRUPT_COMMAND_REGISTER_BITS_32_63
    alternative_name: INTERRUPT_COMMAND_BITS_32_63
    description: Interrupt Command Register (ICR); bits 32-63.
    access: Read/Write

  - value: 0x320
    short_name: LVT_TIMER
    long_name: LVT_TIMER_REGISTER
    alternative_name: LVT_TIMER
    description: LVT Timer Register.
    access: Read/Write

  - value: 0x330
    short_name: LVT_THERMAL_SENSOR
    long_name: LVT_THERMAL_SENSOR_REGISTER
    alternative_name: LVT_THERMAL_SENSOR
    description: LVT Thermal Sensor Register.
    access: Read/Write

  - value: 0x340
    short_name: LVT_PERFORMANCE_MONITORING_COUNTERS
    long_name: LVT_PERFORMANCE_MONITORING_COUNTERS_REGISTER
    alternative_name: LVT_PERFORMANCE_MONITORING_COUNTERS
    description: LVT Performance Monitoring Counters Register.
    access: Read/Write

  - value: 0x350
    short_name: LVT_LINT0
    long_name: LVT_LINT0_REGISTER
    alternative_name: LVT_LINT0
    description: LVT LINT0 Register.
    access: Read/Write

  - value: 0x360
    short_name: LVT_LINT1
    long_name: LVT_LINT1_REGISTER
    alternative_name: LVT_LINT1
    description: LVT LINT1 Register.
    access: Read/Write

  - value: 0x370
    short_name: LVT_ERROR
    long_name: LVT_ERROR_REGISTER
    alternative_name: LVT_ERROR
    description: LVT Error Register.
    access: Read/Write

  - value: 0x380
    short_name: INITIAL_COUNT
    long_name: INITIAL_COUNT_REGISTER
    alternative_name: INITIAL_COUNT
    description: Initial Count Register (for Timer).
    access: Read/Write

  - value: 0x390
    short_name: CURRENT_COUNT
    long_name: CURRENT_COUNT_REGISTER
    alternative_name: CURRENT_COUNT
    description: Current Count Register (for Timer).
    access: Read Only

  - value: 0x3E0
    short_name: DIVIDE_CONFIGURATION
    long_name: DIVIDE_CONFIGURATION_REGISTER
    alternative_name: DIVIDE_CONFIGURATION
    description: Divide Configuration Register (for Timer).
    access: Read/Write