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[InstCombine] vary commuted patterns for mul fold; NFC
Try to get better coverage for the pattern-matching possibilities in D136015.
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‎llvm/test/Transforms/InstCombine/mul_fold.ll‎

Lines changed: 56 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -41,25 +41,27 @@ define i8 @mul8_low_A0_B0(i8 %in0, i8 %in1) {
4141
ret i8 %retLo
4242
}
4343

44-
define i8 @mul8_low_A0_B1(i8 %in0, i8 %in1) {
44+
define i8 @mul8_low_A0_B1(i8 %p, i8 %in1) {
4545
; CHECK-LABEL: @mul8_low_A0_B1(
46-
; CHECK-NEXT: [[IN0LO:%.*]] = and i8 [[IN0:%.*]], 15
46+
; CHECK-NEXT: [[IN0:%.*]] = call i8 @use8(i8 [[P:%.*]])
47+
; CHECK-NEXT: [[IN0LO:%.*]] = and i8 [[IN0]], 15
4748
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i8 [[IN0]], 4
4849
; CHECK-NEXT: [[IN1LO:%.*]] = and i8 [[IN1:%.*]], 15
4950
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i8 [[IN1]], 4
50-
; CHECK-NEXT: [[M10:%.*]] = mul i8 [[IN1HI]], [[IN0]]
51+
; CHECK-NEXT: [[M10:%.*]] = mul i8 [[IN0]], [[IN1HI]]
5152
; CHECK-NEXT: [[M01:%.*]] = mul i8 [[IN0HI]], [[IN1]]
5253
; CHECK-NEXT: [[M00:%.*]] = mul nuw i8 [[IN1LO]], [[IN0LO]]
5354
; CHECK-NEXT: [[ADDC:%.*]] = add i8 [[M10]], [[M01]]
5455
; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[ADDC]], 4
5556
; CHECK-NEXT: [[RETLO:%.*]] = add i8 [[M00]], [[SHL]]
5657
; CHECK-NEXT: ret i8 [[RETLO]]
5758
;
59+
%in0 = call i8 @use8(i8 %p) ; thwart complexity-based canonicalization
5860
%In0Lo = and i8 %in0, 15
5961
%In0Hi = lshr i8 %in0, 4
6062
%In1Lo = and i8 %in1, 15
6163
%In1Hi = lshr i8 %in1, 4
62-
%m10 = mul i8 %In1Hi, %in0
64+
%m10 = mul i8 %in0, %In1Hi
6365
%m01 = mul i8 %In0Hi, %in1
6466
%m00 = mul i8 %In1Lo, %In0Lo
6567
%addc = add i8 %m10, %m01
@@ -68,53 +70,60 @@ define i8 @mul8_low_A0_B1(i8 %in0, i8 %in1) {
6870
ret i8 %retLo
6971
}
7072

71-
define i8 @mul8_low_A0_B2(i8 %in0, i8 %in1) {
73+
define i8 @mul8_low_A0_B2(i8 %in0, i8 %p) {
7274
; CHECK-LABEL: @mul8_low_A0_B2(
75+
; CHECK-NEXT: [[IN1:%.*]] = call i8 @use8(i8 [[P:%.*]])
7376
; CHECK-NEXT: [[IN0LO:%.*]] = and i8 [[IN0:%.*]], 15
7477
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i8 [[IN0]], 4
75-
; CHECK-NEXT: [[IN1LO:%.*]] = and i8 [[IN1:%.*]], 15
78+
; CHECK-NEXT: [[IN1LO:%.*]] = and i8 [[IN1]], 15
7679
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i8 [[IN1]], 4
7780
; CHECK-NEXT: [[M10:%.*]] = mul i8 [[IN1HI]], [[IN0]]
78-
; CHECK-NEXT: [[M01:%.*]] = mul i8 [[IN0HI]], [[IN1]]
81+
; CHECK-NEXT: [[M01:%.*]] = mul i8 [[IN1]], [[IN0HI]]
7982
; CHECK-NEXT: [[M00:%.*]] = mul nuw i8 [[IN1LO]], [[IN0LO]]
8083
; CHECK-NEXT: [[ADDC:%.*]] = add i8 [[M01]], [[M10]]
8184
; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[ADDC]], 4
8285
; CHECK-NEXT: [[RETLO:%.*]] = add i8 [[SHL]], [[M00]]
8386
; CHECK-NEXT: ret i8 [[RETLO]]
8487
;
88+
89+
%in1 = call i8 @use8(i8 %p) ; thwart complexity-based canonicalization
8590
%In0Lo = and i8 %in0, 15
8691
%In0Hi = lshr i8 %in0, 4
8792
%In1Lo = and i8 %in1, 15
8893
%In1Hi = lshr i8 %in1, 4
8994
%m10 = mul i8 %In1Hi, %in0
90-
%m01 = mul i8 %In0Hi, %in1
95+
%m01 = mul i8 %in1, %In0Hi
9196
%m00 = mul i8 %In1Lo, %In0Lo
9297
%addc = add i8 %m01, %m10
9398
%shl = shl i8 %addc, 4
9499
%retLo = add i8 %shl, %m00
95100
ret i8 %retLo
96101
}
97102

98-
define i8 @mul8_low_A0_B3(i8 %in0, i8 %in1) {
103+
define i8 @mul8_low_A0_B3(i8 %p, i8 %q) {
99104
; CHECK-LABEL: @mul8_low_A0_B3(
100-
; CHECK-NEXT: [[IN0LO:%.*]] = and i8 [[IN0:%.*]], 15
105+
; CHECK-NEXT: [[IN0:%.*]] = call i8 @use8(i8 [[P:%.*]])
106+
; CHECK-NEXT: [[IN1:%.*]] = call i8 @use8(i8 [[Q:%.*]])
107+
; CHECK-NEXT: [[IN0LO:%.*]] = and i8 [[IN0]], 15
101108
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i8 [[IN0]], 4
102-
; CHECK-NEXT: [[IN1LO:%.*]] = and i8 [[IN1:%.*]], 15
109+
; CHECK-NEXT: [[IN1LO:%.*]] = and i8 [[IN1]], 15
103110
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i8 [[IN1]], 4
104-
; CHECK-NEXT: [[M10:%.*]] = mul i8 [[IN1HI]], [[IN0]]
105-
; CHECK-NEXT: [[M01:%.*]] = mul i8 [[IN0HI]], [[IN1]]
111+
; CHECK-NEXT: [[M10:%.*]] = mul i8 [[IN0]], [[IN1HI]]
112+
; CHECK-NEXT: [[M01:%.*]] = mul i8 [[IN1]], [[IN0HI]]
106113
; CHECK-NEXT: [[M00:%.*]] = mul nuw i8 [[IN1LO]], [[IN0LO]]
107114
; CHECK-NEXT: [[ADDC:%.*]] = add i8 [[M01]], [[M10]]
108115
; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[ADDC]], 4
109116
; CHECK-NEXT: [[RETLO:%.*]] = add i8 [[M00]], [[SHL]]
110117
; CHECK-NEXT: ret i8 [[RETLO]]
111118
;
119+
%in0 = call i8 @use8(i8 %p) ; thwart complexity-based canonicalization
120+
%in1 = call i8 @use8(i8 %q) ; thwart complexity-based canonicalization
112121
%In0Lo = and i8 %in0, 15
113122
%In0Hi = lshr i8 %in0, 4
114123
%In1Lo = and i8 %in1, 15
115124
%In1Hi = lshr i8 %in1, 4
116-
%m10 = mul i8 %In1Hi, %in0
117-
%m01 = mul i8 %In0Hi, %in1
125+
%m10 = mul i8 %in0, %In1Hi
126+
%m01 = mul i8 %in1, %In0Hi
118127
%m00 = mul i8 %In1Lo, %In0Lo
119128
%addc = add i8 %m01, %m10
120129
%shl = shl i8 %addc, 4
@@ -162,7 +171,7 @@ define i16 @mul16_low_A1_B1(i16 %in0, i16 %in1) {
162171
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i16 [[IN1]], 8
163172
; CHECK-NEXT: [[M10:%.*]] = mul nuw i16 [[IN0LO]], [[IN1HI]]
164173
; CHECK-NEXT: call void @use16(i16 [[M10]])
165-
; CHECK-NEXT: [[M01:%.*]] = mul nuw i16 [[IN1LO]], [[IN0HI]]
174+
; CHECK-NEXT: [[M01:%.*]] = mul nuw i16 [[IN0HI]], [[IN1LO]]
166175
; CHECK-NEXT: call void @use16(i16 [[M01]])
167176
; CHECK-NEXT: [[M00:%.*]] = mul nuw i16 [[IN1LO]], [[IN0LO]]
168177
; CHECK-NEXT: [[ADDC:%.*]] = add i16 [[M10]], [[M01]]
@@ -176,7 +185,7 @@ define i16 @mul16_low_A1_B1(i16 %in0, i16 %in1) {
176185
%In1Hi = lshr i16 %in1, 8
177186
%m10 = mul i16 %In0Lo, %In1Hi
178187
call void @use16(i16 %m10)
179-
%m01 = mul i16 %In1Lo, %In0Hi
188+
%m01 = mul i16 %In0Hi, %In1Lo
180189
call void @use16(i16 %m01)
181190
%m00 = mul i16 %In1Lo, %In0Lo
182191
%addc = add i16 %m10, %m01
@@ -191,7 +200,7 @@ define i16 @mul16_low_A1_B2(i16 %in0, i16 %in1) {
191200
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i16 [[IN0]], 8
192201
; CHECK-NEXT: [[IN1LO:%.*]] = and i16 [[IN1:%.*]], 255
193202
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i16 [[IN1]], 8
194-
; CHECK-NEXT: [[M10:%.*]] = mul nuw i16 [[IN0LO]], [[IN1HI]]
203+
; CHECK-NEXT: [[M10:%.*]] = mul nuw i16 [[IN1HI]], [[IN0LO]]
195204
; CHECK-NEXT: call void @use16(i16 [[M10]])
196205
; CHECK-NEXT: [[M01:%.*]] = mul nuw i16 [[IN1LO]], [[IN0HI]]
197206
; CHECK-NEXT: call void @use16(i16 [[M01]])
@@ -205,7 +214,7 @@ define i16 @mul16_low_A1_B2(i16 %in0, i16 %in1) {
205214
%In0Hi = lshr i16 %in0, 8
206215
%In1Lo = and i16 %in1, 255
207216
%In1Hi = lshr i16 %in1, 8
208-
%m10 = mul i16 %In0Lo, %In1Hi
217+
%m10 = mul i16 %In1Hi, %In0Lo
209218
call void @use16(i16 %m10)
210219
%m01 = mul i16 %In1Lo, %In0Hi
211220
call void @use16(i16 %m01)
@@ -306,57 +315,61 @@ define i32 @mul32_low_A2_B1(i32 %in0, i32 %in1) {
306315
ret i32 %retLo
307316
}
308317

309-
define i32 @mul32_low_A2_B2(i32 %in0, i32 %in1) {
318+
define i32 @mul32_low_A2_B2(i32 %in0, i32 %p) {
310319
; CHECK-LABEL: @mul32_low_A2_B2(
320+
; CHECK-NEXT: [[IN1:%.*]] = call i32 @use32(i32 [[P:%.*]])
311321
; CHECK-NEXT: [[IN0LO:%.*]] = and i32 [[IN0:%.*]], 65535
312322
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i32 [[IN0]], 16
313-
; CHECK-NEXT: [[IN1LO:%.*]] = and i32 [[IN1:%.*]], 65535
323+
; CHECK-NEXT: [[IN1LO:%.*]] = and i32 [[IN1]], 65535
314324
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i32 [[IN1]], 16
315-
; CHECK-NEXT: [[M10:%.*]] = mul nuw i32 [[IN1HI]], [[IN0LO]]
325+
; CHECK-NEXT: [[M10:%.*]] = mul nuw i32 [[IN0LO]], [[IN1HI]]
316326
; CHECK-NEXT: call void @use32(i32 [[M10]])
317-
; CHECK-NEXT: [[M01:%.*]] = mul i32 [[IN0HI]], [[IN1]]
327+
; CHECK-NEXT: [[M01:%.*]] = mul i32 [[IN1]], [[IN0HI]]
318328
; CHECK-NEXT: [[M00:%.*]] = mul nuw i32 [[IN1LO]], [[IN0LO]]
319329
; CHECK-NEXT: [[ADDC:%.*]] = add i32 [[M01]], [[M10]]
320330
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[ADDC]], 16
321331
; CHECK-NEXT: [[RETLO:%.*]] = add i32 [[SHL]], [[M00]]
322332
; CHECK-NEXT: ret i32 [[RETLO]]
323333
;
334+
%in1 = call i32 @use32(i32 %p) ; thwart complexity-based canonicalization
324335
%In0Lo = and i32 %in0, 65535
325336
%In0Hi = lshr i32 %in0, 16
326337
%In1Lo = and i32 %in1, 65535
327338
%In1Hi = lshr i32 %in1, 16
328-
%m10 = mul i32 %In1Hi, %In0Lo
339+
%m10 = mul i32 %In0Lo, %In1Hi
329340
call void @use32(i32 %m10)
330-
%m01 = mul i32 %In0Hi, %in1
341+
%m01 = mul i32 %in1, %In0Hi
331342
%m00 = mul i32 %In1Lo, %In0Lo
332343
%addc = add i32 %m01, %m10
333344
%shl = shl i32 %addc, 16
334345
%retLo = add i32 %shl, %m00
335346
ret i32 %retLo
336347
}
337348

338-
define i32 @mul32_low_A2_B3(i32 %in0, i32 %in1) {
349+
define i32 @mul32_low_A2_B3(i32 %in0, i32 %p) {
339350
; CHECK-LABEL: @mul32_low_A2_B3(
351+
; CHECK-NEXT: [[IN1:%.*]] = call i32 @use32(i32 [[P:%.*]])
340352
; CHECK-NEXT: [[IN0LO:%.*]] = and i32 [[IN0:%.*]], 65535
341353
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i32 [[IN0]], 16
342-
; CHECK-NEXT: [[IN1LO:%.*]] = and i32 [[IN1:%.*]], 65535
354+
; CHECK-NEXT: [[IN1LO:%.*]] = and i32 [[IN1]], 65535
343355
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i32 [[IN1]], 16
344356
; CHECK-NEXT: [[M10:%.*]] = mul nuw i32 [[IN1HI]], [[IN0LO]]
345357
; CHECK-NEXT: call void @use32(i32 [[M10]])
346-
; CHECK-NEXT: [[M01:%.*]] = mul i32 [[IN0HI]], [[IN1]]
358+
; CHECK-NEXT: [[M01:%.*]] = mul i32 [[IN1]], [[IN0HI]]
347359
; CHECK-NEXT: [[M00:%.*]] = mul nuw i32 [[IN1LO]], [[IN0LO]]
348360
; CHECK-NEXT: [[ADDC:%.*]] = add i32 [[M01]], [[M10]]
349361
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[ADDC]], 16
350362
; CHECK-NEXT: [[RETLO:%.*]] = add i32 [[M00]], [[SHL]]
351363
; CHECK-NEXT: ret i32 [[RETLO]]
352364
;
365+
%in1 = call i32 @use32(i32 %p) ; thwart complexity-based canonicalization
353366
%In0Lo = and i32 %in0, 65535
354367
%In0Hi = lshr i32 %in0, 16
355368
%In1Lo = and i32 %in1, 65535
356369
%In1Hi = lshr i32 %in1, 16
357370
%m10 = mul i32 %In1Hi, %In0Lo
358371
call void @use32(i32 %m10)
359-
%m01 = mul i32 %In0Hi, %in1
372+
%m01 = mul i32 %in1, %In0Hi
360373
%m00 = mul i32 %In1Lo, %In0Lo
361374
%addc = add i32 %m01, %m10
362375
%shl = shl i32 %addc, 16
@@ -423,13 +436,14 @@ define i64 @mul64_low_A3_B1(i64 %in0, i64 %in1) {
423436
ret i64 %retLo
424437
}
425438

426-
define i64 @mul64_low_A3_B2(i64 %in0, i64 %in1) {
439+
define i64 @mul64_low_A3_B2(i64 %p, i64 %in1) {
427440
; CHECK-LABEL: @mul64_low_A3_B2(
428-
; CHECK-NEXT: [[IN0LO:%.*]] = and i64 [[IN0:%.*]], 4294967295
441+
; CHECK-NEXT: [[IN0:%.*]] = call i64 @use64(i64 [[P:%.*]])
442+
; CHECK-NEXT: [[IN0LO:%.*]] = and i64 [[IN0]], 4294967295
429443
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i64 [[IN0]], 32
430444
; CHECK-NEXT: [[IN1LO:%.*]] = and i64 [[IN1:%.*]], 4294967295
431445
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i64 [[IN1]], 32
432-
; CHECK-NEXT: [[M10:%.*]] = mul i64 [[IN1HI]], [[IN0]]
446+
; CHECK-NEXT: [[M10:%.*]] = mul i64 [[IN0]], [[IN1HI]]
433447
; CHECK-NEXT: [[M01:%.*]] = mul nuw i64 [[IN0HI]], [[IN1LO]]
434448
; CHECK-NEXT: call void @use64(i64 [[M01]])
435449
; CHECK-NEXT: [[M00:%.*]] = mul nuw i64 [[IN1LO]], [[IN0LO]]
@@ -438,11 +452,12 @@ define i64 @mul64_low_A3_B2(i64 %in0, i64 %in1) {
438452
; CHECK-NEXT: [[RETLO:%.*]] = add i64 [[SHL]], [[M00]]
439453
; CHECK-NEXT: ret i64 [[RETLO]]
440454
;
455+
%in0 = call i64 @use64(i64 %p) ; thwart complexity-based canonicalization
441456
%In0Lo = and i64 %in0, 4294967295
442457
%In0Hi = lshr i64 %in0, 32
443458
%In1Lo = and i64 %in1, 4294967295
444459
%In1Hi = lshr i64 %in1, 32
445-
%m10 = mul i64 %In1Hi, %in0
460+
%m10 = mul i64 %in0, %In1Hi
446461
%m01 = mul i64 %In0Hi, %In1Lo
447462
call void @use64(i64 %m01)
448463
%m00 = mul i64 %In1Lo, %In0Lo
@@ -452,27 +467,29 @@ define i64 @mul64_low_A3_B2(i64 %in0, i64 %in1) {
452467
ret i64 %retLo
453468
}
454469

455-
define i64 @mul64_low_A3_B3(i64 %in0, i64 %in1) {
470+
define i64 @mul64_low_A3_B3(i64 %p, i64 %in1) {
456471
; CHECK-LABEL: @mul64_low_A3_B3(
457-
; CHECK-NEXT: [[IN0LO:%.*]] = and i64 [[IN0:%.*]], 4294967295
472+
; CHECK-NEXT: [[IN0:%.*]] = call i64 @use64(i64 [[P:%.*]])
473+
; CHECK-NEXT: [[IN0LO:%.*]] = and i64 [[IN0]], 4294967295
458474
; CHECK-NEXT: [[IN0HI:%.*]] = lshr i64 [[IN0]], 32
459475
; CHECK-NEXT: [[IN1LO:%.*]] = and i64 [[IN1:%.*]], 4294967295
460476
; CHECK-NEXT: [[IN1HI:%.*]] = lshr i64 [[IN1]], 32
461-
; CHECK-NEXT: [[M10:%.*]] = mul i64 [[IN1HI]], [[IN0]]
462-
; CHECK-NEXT: [[M01:%.*]] = mul nuw i64 [[IN0HI]], [[IN1LO]]
477+
; CHECK-NEXT: [[M10:%.*]] = mul i64 [[IN0]], [[IN1HI]]
478+
; CHECK-NEXT: [[M01:%.*]] = mul nuw i64 [[IN1LO]], [[IN0HI]]
463479
; CHECK-NEXT: call void @use64(i64 [[M01]])
464480
; CHECK-NEXT: [[M00:%.*]] = mul nuw i64 [[IN1LO]], [[IN0LO]]
465481
; CHECK-NEXT: [[ADDC:%.*]] = add i64 [[M01]], [[M10]]
466482
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[ADDC]], 32
467483
; CHECK-NEXT: [[RETLO:%.*]] = add i64 [[M00]], [[SHL]]
468484
; CHECK-NEXT: ret i64 [[RETLO]]
469485
;
486+
%in0 = call i64 @use64(i64 %p) ; thwart complexity-based canonicalization
470487
%In0Lo = and i64 %in0, 4294967295
471488
%In0Hi = lshr i64 %in0, 32
472489
%In1Lo = and i64 %in1, 4294967295
473490
%In1Hi = lshr i64 %in1, 32
474-
%m10 = mul i64 %In1Hi, %in0
475-
%m01 = mul i64 %In0Hi, %In1Lo
491+
%m10 = mul i64 %in0, %In1Hi
492+
%m01 = mul i64 %In1Lo, %In0Hi
476493
call void @use64(i64 %m01)
477494
%m00 = mul i64 %In1Lo, %In0Lo
478495
%addc = add i64 %m01, %m10

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