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Team sync‐ups
Arseny Bochkarev edited this page Mar 22, 2025
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22-mar-25 (Exegesis):
- Article about RVV: https://fprox.substack.com/p/risc-v-vector-extension-in-a-nutshell-part-1
- Patch from SiFive:
- Problem is: same instructions produce different results based on
vsetvl - Current solution is:
- Generate all possible vector unit programming cases in snippets for benchmarking using multiple passes:
- RISCVInsertVSETVIPass
- RISCVInsertWriteVXRMPass
- Post-processing pass
- Patch introduced opcodes in
MCInstr
- Generate all possible vector unit programming cases in snippets for benchmarking using multiple passes:
- Problem is: same instructions produce different results based on
16-mar-25 (Exegesis):
- Three patches for RVV for Exegesis:
- Initial support (merged): https://github.com/llvm/llvm-project/pull/128767
- Improvements (opened, no activity): https://github.com/llvm/llvm-project/pull/114149
- Winter school (not finished): https://github.com/e1turin/llvm-project/pull/1
- We need to understand what was already done: so a to-do is to check which instructions are currently supported
- A good path would be to track what's going on in current implementation for some know-to-work instruction (like
vmul) - CI will wait (a month approximately)
16-mar-25 (MCA):
- Read: https://habr.com/ru/articles/474460/
- grep how MCA uses SchedModel (I guess we should not change any interfaces)
- scalable vectorization in other CPUs in LLVM: What's number of microops?
- take a look at MCA for SiFive CPUs
- Need to add FU count in a sched model
-
RISCVSchedSiFiveP400.td for reference
- Try to feed to MCA, how it handles RVV
12-mar-25 (Syntacore):
- More interactions with green team
- performance tools (llvm-based):
- llvm-mca: code analysis (any random code snippet)
- llvm-exegesis: hardware analysis
- We need to try to union them in some sort
- Exegesis doesn't use LLVM's SchedModel as full as possible. Initial RVV is supported
- Traditional LLVM's SchedModel doesn't suite RVV well: we need to widen it (e.g. functional units number)
- MCA RVV: no rvv at all
- Decomp: mca rvv , schedmodel for exegesis , widening schedmodel for RVV, bring-up (saturn-vectors, real hardware)
- Need to do decomposition
- Org
- Biweekly meetings
- Monthly -- both teams
- Next meeting:
19-mar-25
- Need to get familiar with both tools