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LewisCrawfordLewisCrawford
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Move helper functions into separate file
Move NVVM intrinsic helper functions into NVVMIntrinsicFlags.h and then rename it NVVMIntrinsicUtils.h.
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+179
-182
lines changed

5 files changed

+179
-182
lines changed

‎llvm/include/llvm/IR/NVVMIntrinsicFlags.h‎

Lines changed: 0 additions & 39 deletions
This file was deleted.

‎llvm/include/llvm/IR/NVVMIntrinsicUtils.h‎

Lines changed: 173 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,173 @@
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//===--- NVVMIntrinsicUtils.h -----------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file contains the definitions of the enumerations and flags
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/// associated with NVVM Intrinsics.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_IR_NVVMINTRINSICUTILS_H
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#define LLVM_IR_NVVMINTRINSICUTILS_H
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#include "llvm/ADT/APFloat.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicsNVPTX.h"
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namespace llvm {
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namespace nvvm {
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// Reduction Ops supported with TMA Copy from Shared
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// to Global Memory for the "cp.reduce.async.bulk.tensor.*"
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// family of PTX instructions.
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enum class TMAReductionOp : uint8_t {
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ADD = 0,
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MIN = 1,
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MAX = 2,
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INC = 3,
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DEC = 4,
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AND = 5,
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OR = 6,
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XOR = 7,
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};
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bool IntrinsicShouldFTZ(Intrinsic::ID IntrinsicID) {
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switch (IntrinsicID) {
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// Float to i32 / i64 conversion intrinsics:
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case Intrinsic::nvvm_f2i_rm_ftz:
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case Intrinsic::nvvm_f2i_rn_ftz:
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case Intrinsic::nvvm_f2i_rp_ftz:
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case Intrinsic::nvvm_f2i_rz_ftz:
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case Intrinsic::nvvm_f2ui_rm_ftz:
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case Intrinsic::nvvm_f2ui_rn_ftz:
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case Intrinsic::nvvm_f2ui_rp_ftz:
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case Intrinsic::nvvm_f2ui_rz_ftz:
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case Intrinsic::nvvm_f2ll_rm_ftz:
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case Intrinsic::nvvm_f2ll_rn_ftz:
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case Intrinsic::nvvm_f2ll_rp_ftz:
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case Intrinsic::nvvm_f2ll_rz_ftz:
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case Intrinsic::nvvm_f2ull_rm_ftz:
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case Intrinsic::nvvm_f2ull_rn_ftz:
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case Intrinsic::nvvm_f2ull_rp_ftz:
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case Intrinsic::nvvm_f2ull_rz_ftz:
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return true;
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}
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return false;
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}
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bool IntrinsicConvertsToSignedInteger(Intrinsic::ID IntrinsicID) {
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switch (IntrinsicID) {
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// f2i
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case Intrinsic::nvvm_f2i_rm:
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case Intrinsic::nvvm_f2i_rm_ftz:
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case Intrinsic::nvvm_f2i_rn:
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case Intrinsic::nvvm_f2i_rn_ftz:
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case Intrinsic::nvvm_f2i_rp:
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case Intrinsic::nvvm_f2i_rp_ftz:
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case Intrinsic::nvvm_f2i_rz:
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case Intrinsic::nvvm_f2i_rz_ftz:
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// d2i
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case Intrinsic::nvvm_d2i_rm:
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case Intrinsic::nvvm_d2i_rn:
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case Intrinsic::nvvm_d2i_rp:
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case Intrinsic::nvvm_d2i_rz:
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// f2ll
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case Intrinsic::nvvm_f2ll_rm:
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case Intrinsic::nvvm_f2ll_rm_ftz:
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case Intrinsic::nvvm_f2ll_rn:
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case Intrinsic::nvvm_f2ll_rn_ftz:
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case Intrinsic::nvvm_f2ll_rp:
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case Intrinsic::nvvm_f2ll_rp_ftz:
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case Intrinsic::nvvm_f2ll_rz:
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case Intrinsic::nvvm_f2ll_rz_ftz:
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// d2ll
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case Intrinsic::nvvm_d2ll_rm:
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case Intrinsic::nvvm_d2ll_rn:
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case Intrinsic::nvvm_d2ll_rp:
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case Intrinsic::nvvm_d2ll_rz:
96+
return true;
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}
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return false;
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}
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APFloat::roundingMode IntrinsicGetRoundingMode(Intrinsic::ID IntrinsicID) {
102+
switch (IntrinsicID) {
103+
// RM:
104+
case Intrinsic::nvvm_f2i_rm:
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case Intrinsic::nvvm_f2ui_rm:
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case Intrinsic::nvvm_f2i_rm_ftz:
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case Intrinsic::nvvm_f2ui_rm_ftz:
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case Intrinsic::nvvm_d2i_rm:
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case Intrinsic::nvvm_d2ui_rm:
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case Intrinsic::nvvm_f2ll_rm:
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case Intrinsic::nvvm_f2ull_rm:
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case Intrinsic::nvvm_f2ll_rm_ftz:
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case Intrinsic::nvvm_f2ull_rm_ftz:
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case Intrinsic::nvvm_d2ll_rm:
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case Intrinsic::nvvm_d2ull_rm:
117+
return APFloat::rmTowardNegative;
118+
119+
// RN:
120+
case Intrinsic::nvvm_f2i_rn:
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case Intrinsic::nvvm_f2ui_rn:
122+
case Intrinsic::nvvm_f2i_rn_ftz:
123+
case Intrinsic::nvvm_f2ui_rn_ftz:
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case Intrinsic::nvvm_d2i_rn:
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case Intrinsic::nvvm_d2ui_rn:
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case Intrinsic::nvvm_f2ll_rn:
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case Intrinsic::nvvm_f2ull_rn:
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case Intrinsic::nvvm_f2ll_rn_ftz:
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case Intrinsic::nvvm_f2ull_rn_ftz:
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case Intrinsic::nvvm_d2ll_rn:
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case Intrinsic::nvvm_d2ull_rn:
133+
return APFloat::rmNearestTiesToEven;
134+
135+
// RP:
136+
case Intrinsic::nvvm_f2i_rp:
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case Intrinsic::nvvm_f2ui_rp:
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case Intrinsic::nvvm_f2i_rp_ftz:
139+
case Intrinsic::nvvm_f2ui_rp_ftz:
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case Intrinsic::nvvm_d2i_rp:
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case Intrinsic::nvvm_d2ui_rp:
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case Intrinsic::nvvm_f2ll_rp:
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case Intrinsic::nvvm_f2ull_rp:
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case Intrinsic::nvvm_f2ll_rp_ftz:
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case Intrinsic::nvvm_f2ull_rp_ftz:
147+
case Intrinsic::nvvm_d2ll_rp:
148+
case Intrinsic::nvvm_d2ull_rp:
149+
return APFloat::rmTowardPositive;
150+
151+
// RZ:
152+
case Intrinsic::nvvm_f2i_rz:
153+
case Intrinsic::nvvm_f2ui_rz:
154+
case Intrinsic::nvvm_f2i_rz_ftz:
155+
case Intrinsic::nvvm_f2ui_rz_ftz:
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case Intrinsic::nvvm_d2i_rz:
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case Intrinsic::nvvm_d2ui_rz:
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case Intrinsic::nvvm_f2ll_rz:
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case Intrinsic::nvvm_f2ull_rz:
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case Intrinsic::nvvm_f2ll_rz_ftz:
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case Intrinsic::nvvm_f2ull_rz_ftz:
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case Intrinsic::nvvm_d2ll_rz:
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case Intrinsic::nvvm_d2ull_rz:
165+
return APFloat::rmTowardZero;
166+
}
167+
llvm_unreachable("Invalid f2i/d2i rounding mode intrinsic");
168+
return APFloat::roundingMode::Invalid;
169+
}
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} // namespace nvvm
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} // namespace llvm
173+
#endif // LLVM_IR_NVVMINTRINSICUTILS_H

‎llvm/lib/Analysis/ConstantFolding.cpp‎

Lines changed: 4 additions & 141 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,7 @@
4848
#include "llvm/IR/IntrinsicsNVPTX.h"
4949
#include "llvm/IR/IntrinsicsWebAssembly.h"
5050
#include "llvm/IR/IntrinsicsX86.h"
51+
#include "llvm/IR/NVVMIntrinsicUtils.h"
5152
#include "llvm/IR/Operator.h"
5253
#include "llvm/IR/Type.h"
5354
#include "llvm/IR/Value.h"
@@ -290,144 +291,6 @@ Constant *FoldBitCast(Constant *C, Type *DestTy, const DataLayout &DL) {
290291

291292
return ConstantVector::get(Result);
292293
}
293-
294-
//===----------------------------------------------------------------------===//
295-
// NVVM-specific internal helper functions
296-
//===----------------------------------------------------------------------===//
297-
298-
static bool NVVMIntrinsicShouldFTZ(Intrinsic::ID IntrinsicID) {
299-
switch (IntrinsicID) {
300-
// Float to i32 / i64 conversion intrinsics:
301-
case Intrinsic::nvvm_f2i_rm_ftz:
302-
case Intrinsic::nvvm_f2i_rn_ftz:
303-
case Intrinsic::nvvm_f2i_rp_ftz:
304-
case Intrinsic::nvvm_f2i_rz_ftz:
305-
306-
case Intrinsic::nvvm_f2ui_rm_ftz:
307-
case Intrinsic::nvvm_f2ui_rn_ftz:
308-
case Intrinsic::nvvm_f2ui_rp_ftz:
309-
case Intrinsic::nvvm_f2ui_rz_ftz:
310-
311-
case Intrinsic::nvvm_f2ll_rm_ftz:
312-
case Intrinsic::nvvm_f2ll_rn_ftz:
313-
case Intrinsic::nvvm_f2ll_rp_ftz:
314-
case Intrinsic::nvvm_f2ll_rz_ftz:
315-
316-
case Intrinsic::nvvm_f2ull_rm_ftz:
317-
case Intrinsic::nvvm_f2ull_rn_ftz:
318-
case Intrinsic::nvvm_f2ull_rp_ftz:
319-
case Intrinsic::nvvm_f2ull_rz_ftz:
320-
return true;
321-
}
322-
return false;
323-
}
324-
325-
static bool NVVMIntrinsicConvertsToSignedInteger(Intrinsic::ID IntrinsicID) {
326-
switch (IntrinsicID) {
327-
// f2i
328-
case Intrinsic::nvvm_f2i_rm:
329-
case Intrinsic::nvvm_f2i_rm_ftz:
330-
case Intrinsic::nvvm_f2i_rn:
331-
case Intrinsic::nvvm_f2i_rn_ftz:
332-
case Intrinsic::nvvm_f2i_rp:
333-
case Intrinsic::nvvm_f2i_rp_ftz:
334-
case Intrinsic::nvvm_f2i_rz:
335-
case Intrinsic::nvvm_f2i_rz_ftz:
336-
// d2i
337-
case Intrinsic::nvvm_d2i_rm:
338-
case Intrinsic::nvvm_d2i_rn:
339-
case Intrinsic::nvvm_d2i_rp:
340-
case Intrinsic::nvvm_d2i_rz:
341-
// f2ll
342-
case Intrinsic::nvvm_f2ll_rm:
343-
case Intrinsic::nvvm_f2ll_rm_ftz:
344-
case Intrinsic::nvvm_f2ll_rn:
345-
case Intrinsic::nvvm_f2ll_rn_ftz:
346-
case Intrinsic::nvvm_f2ll_rp:
347-
case Intrinsic::nvvm_f2ll_rp_ftz:
348-
case Intrinsic::nvvm_f2ll_rz:
349-
case Intrinsic::nvvm_f2ll_rz_ftz:
350-
// d2ll
351-
case Intrinsic::nvvm_d2ll_rm:
352-
case Intrinsic::nvvm_d2ll_rn:
353-
case Intrinsic::nvvm_d2ll_rp:
354-
case Intrinsic::nvvm_d2ll_rz:
355-
return true;
356-
}
357-
return false;
358-
}
359-
360-
static APFloat::roundingMode
361-
NVVMIntrinsicGetRoundingMode(Intrinsic::ID IntrinsicID) {
362-
switch (IntrinsicID) {
363-
// RM:
364-
case Intrinsic::nvvm_f2i_rm:
365-
case Intrinsic::nvvm_f2ui_rm:
366-
case Intrinsic::nvvm_f2i_rm_ftz:
367-
case Intrinsic::nvvm_f2ui_rm_ftz:
368-
case Intrinsic::nvvm_d2i_rm:
369-
case Intrinsic::nvvm_d2ui_rm:
370-
371-
case Intrinsic::nvvm_f2ll_rm:
372-
case Intrinsic::nvvm_f2ull_rm:
373-
case Intrinsic::nvvm_f2ll_rm_ftz:
374-
case Intrinsic::nvvm_f2ull_rm_ftz:
375-
case Intrinsic::nvvm_d2ll_rm:
376-
case Intrinsic::nvvm_d2ull_rm:
377-
return APFloat::rmTowardNegative;
378-
379-
// RN:
380-
case Intrinsic::nvvm_f2i_rn:
381-
case Intrinsic::nvvm_f2ui_rn:
382-
case Intrinsic::nvvm_f2i_rn_ftz:
383-
case Intrinsic::nvvm_f2ui_rn_ftz:
384-
case Intrinsic::nvvm_d2i_rn:
385-
case Intrinsic::nvvm_d2ui_rn:
386-
387-
case Intrinsic::nvvm_f2ll_rn:
388-
case Intrinsic::nvvm_f2ull_rn:
389-
case Intrinsic::nvvm_f2ll_rn_ftz:
390-
case Intrinsic::nvvm_f2ull_rn_ftz:
391-
case Intrinsic::nvvm_d2ll_rn:
392-
case Intrinsic::nvvm_d2ull_rn:
393-
return APFloat::rmNearestTiesToEven;
394-
395-
// RP:
396-
case Intrinsic::nvvm_f2i_rp:
397-
case Intrinsic::nvvm_f2ui_rp:
398-
case Intrinsic::nvvm_f2i_rp_ftz:
399-
case Intrinsic::nvvm_f2ui_rp_ftz:
400-
case Intrinsic::nvvm_d2i_rp:
401-
case Intrinsic::nvvm_d2ui_rp:
402-
403-
case Intrinsic::nvvm_f2ll_rp:
404-
case Intrinsic::nvvm_f2ull_rp:
405-
case Intrinsic::nvvm_f2ll_rp_ftz:
406-
case Intrinsic::nvvm_f2ull_rp_ftz:
407-
case Intrinsic::nvvm_d2ll_rp:
408-
case Intrinsic::nvvm_d2ull_rp:
409-
return APFloat::rmTowardPositive;
410-
411-
// RZ:
412-
case Intrinsic::nvvm_f2i_rz:
413-
case Intrinsic::nvvm_f2ui_rz:
414-
case Intrinsic::nvvm_f2i_rz_ftz:
415-
case Intrinsic::nvvm_f2ui_rz_ftz:
416-
case Intrinsic::nvvm_d2i_rz:
417-
case Intrinsic::nvvm_d2ui_rz:
418-
419-
case Intrinsic::nvvm_f2ll_rz:
420-
case Intrinsic::nvvm_f2ull_rz:
421-
case Intrinsic::nvvm_f2ll_rz_ftz:
422-
case Intrinsic::nvvm_f2ull_rz_ftz:
423-
case Intrinsic::nvvm_d2ll_rz:
424-
case Intrinsic::nvvm_d2ull_rz:
425-
return APFloat::rmTowardZero;
426-
}
427-
llvm_unreachable("Invalid f2i/d2i rounding mode intrinsic");
428-
return APFloat::roundingMode::Invalid;
429-
}
430-
431294
} // end anonymous namespace
432295

433296
/// If this constant is a constant offset from a global, return the global and
@@ -2567,11 +2430,11 @@ static Constant *ConstantFoldScalarCall1(StringRef Name,
25672430
if (U.isNaN())
25682431
return ConstantInt::get(Ty, 0);
25692432

2570-
APFloat::roundingMode RMode = NVVMIntrinsicGetRoundingMode(IntrinsicID);
2433+
APFloat::roundingMode RMode = nvvm::IntrinsicGetRoundingMode(IntrinsicID);
25712434
assert(RM != APFloat::roundingMode::Invalid);
25722435

2573-
bool IsFTZ = NVVMIntrinsicShouldFTZ(IntrinsicID);
2574-
bool IsSigned = NVVMIntrinsicConvertsToSignedInteger(IntrinsicID);
2436+
bool IsFTZ = nvvm::IntrinsicShouldFTZ(IntrinsicID);
2437+
bool IsSigned = nvvm::IntrinsicConvertsToSignedInteger(IntrinsicID);
25752438

25762439
APSInt ResInt(Ty->getIntegerBitWidth(), !IsSigned);
25772440
auto FloatToRound = IsFTZ ? FTZPreserveSign(U) : U;

‎llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
#include "NVPTX.h"
1515
#include "NVPTXUtilities.h"
1616
#include "llvm/ADT/StringRef.h"
17-
#include "llvm/IR/NVVMIntrinsicFlags.h"
17+
#include "llvm/IR/NVVMIntrinsicUtils.h"
1818
#include "llvm/MC/MCExpr.h"
1919
#include "llvm/MC/MCInst.h"
2020
#include "llvm/MC/MCInstrInfo.h"

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
#include "llvm/IR/GlobalValue.h"
1818
#include "llvm/IR/Instructions.h"
1919
#include "llvm/IR/IntrinsicsNVPTX.h"
20-
#include "llvm/IR/NVVMIntrinsicFlags.h"
20+
#include "llvm/IR/NVVMIntrinsicUtils.h"
2121
#include "llvm/Support/AtomicOrdering.h"
2222
#include "llvm/Support/CommandLine.h"
2323
#include "llvm/Support/ErrorHandling.h"

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