From 9b78a66579d9536e3cc7b58c50f49c66767cf844 Mon Sep 17 00:00:00 2001
From: DoppioT <write@mar.co.tt>
Date: Wed, 18 Feb 2026 19:30:11 +0100
Subject: [PATCH 1/7] Introduced Schmitt triggers w/o power pins

---
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 60 +++++++++++++++++++
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 57 ++++++++++++++++++
 4 files changed, 119 insertions(+)
 create mode 100644 sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/.librepcb-sym
 create mode 100644 sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/symbol.lp
 create mode 100644 sym/9f617b90-e418-4bf9-addc-453156ba2cf9/.librepcb-sym
 create mode 100644 sym/9f617b90-e418-4bf9-addc-453156ba2cf9/symbol.lp

diff --git a/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/.librepcb-sym b/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/symbol.lp b/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/symbol.lp
new file mode 100644
index 0000000..7fbc939
--- /dev/null
+++ b/sym/3c84db44-ad4f-418b-865e-5b54b59b23d9/symbol.lp
@@ -0,0 +1,60 @@
+(librepcb_symbol 3c84db44-ad4f-418b-865e-5b54b59b23d9
+ (name "Schmitt Trigger Inverting Without Power Pins")
+ (description "")
+ (keywords "inverting,schmitt,trigger,logic")
+ (author "Marco")
+ (version "0.1")
+ (created 2026-02-18T18:18:22Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin fce326ea-6a5b-4ca0-acc0-27f3bafa1af1 (name "IN")
+  (position -7.62 0.0) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 97759501-f5e9-458f-b29c-3296f7df00d4 (name "OUT")
+  (position 7.62 0.0) (rotation 180.0) (length 1.27)
+  (name_position 2.54 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 62ae0886-003d-480c-a0d8-379d9183032c (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 1.27) (angle 0.0))
+  (vertex (position -3.175 -1.27) (angle 0.0))
+ )
+ (polygon f10bd2e8-6e59-4512-82aa-8cbd288615a4 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 1.27) (angle 0.0))
+  (vertex (position 0.635 1.27) (angle 0.0))
+ )
+ (polygon 05cad5f3-b792-4383-b38a-3f416491d11a (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area true)
+  (vertex (position -5.08 5.08) (angle 0.0))
+  (vertex (position -5.08 -5.08) (angle 0.0))
+  (vertex (position 5.08 0.0) (angle 0.0))
+  (vertex (position -5.08 5.08) (angle 0.0))
+ )
+ (polygon 29f88e9b-4d2b-4bff-be08-f5a08eb2e7db (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 -1.27) (angle 0.0))
+  (vertex (position -4.445 -1.27) (angle 0.0))
+ )
+ (polygon 1bcdeee3-0ba3-431e-a808-e29551f77252 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 -1.27) (angle 0.0))
+  (vertex (position -0.635 1.27) (angle 0.0))
+ )
+ (circle 6118d9f0-5c68-4e8c-99e2-757db9b52d55 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false) (diameter 1.27) (position 5.715 0.0)
+ )
+ (text 50c6c973-51f6-4aa3-8ff8-d58f15518742 (layer sym_values) (height 2.54)
+  (align left top) (position 1.905 -2.54) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+ (text 833d4043-8bed-42cf-a3f9-c86f63a0818e (layer sym_names) (height 2.54)
+  (align left bottom) (position 1.905 2.54) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+)
diff --git a/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/.librepcb-sym b/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/symbol.lp b/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/symbol.lp
new file mode 100644
index 0000000..ee8211d
--- /dev/null
+++ b/sym/9f617b90-e418-4bf9-addc-453156ba2cf9/symbol.lp
@@ -0,0 +1,57 @@
+(librepcb_symbol 9f617b90-e418-4bf9-addc-453156ba2cf9
+ (name "Schmitt Trigger Non-Inverting Without Power Pins")
+ (description "")
+ (keywords "inverting,schmitt,trigger,logic")
+ (author "DoppioT")
+ (version "0.1")
+ (created 2026-02-18T18:20:14Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin 10352346-bd62-40cc-83fa-62e4fd4be92b (name "IN")
+  (position -7.62 0.0) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 8b5d71a6-521b-4056-a9fa-d3e86bb35349 (name "OUT")
+  (position 7.62 0.0) (rotation 180.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 656124ee-0c48-4b79-8769-ac96bdde5375 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 1.27) (angle 0.0))
+  (vertex (position -3.175 -1.27) (angle 0.0))
+ )
+ (polygon 6d615f88-8791-406f-85b2-d8d8339bb020 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 -1.27) (angle 0.0))
+  (vertex (position -0.635 1.27) (angle 0.0))
+ )
+ (polygon 47c8c69b-7b43-4fc4-9f96-c0ab88976435 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area true)
+  (vertex (position -5.08 5.08) (angle 0.0))
+  (vertex (position -5.08 -5.08) (angle 0.0))
+  (vertex (position 5.08 0.0) (angle 0.0))
+  (vertex (position -5.08 5.08) (angle 0.0))
+ )
+ (polygon b2597da2-998e-428b-b567-c0441d0ad0ca (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 -1.27) (angle 0.0))
+  (vertex (position -4.445 -1.27) (angle 0.0))
+ )
+ (polygon 17215710-6439-46b0-9ea4-250e4de07da8 (layer sym_outlines)
+  (width 0.254) (fill false) (grab_area false)
+  (vertex (position -1.905 1.27) (angle 0.0))
+  (vertex (position 0.635 1.27) (angle 0.0))
+ )
+ (text 2568e05d-658b-4959-96b0-1e490899b632 (layer sym_names) (height 2.54)
+  (align left bottom) (position 1.905 2.54) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text c4aba4c9-cdc9-46a6-bf4f-af29d0196489 (layer sym_values) (height 2.54)
+  (align left top) (position 1.905 -2.54) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)

From 227beabe9906afc20efa37847881ca3d97298c45 Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Sat, 21 Feb 2026 16:57:44 +0100
Subject: [PATCH 2/7] Symbols for AND and NAND gates

---
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 43 +++++++++++++++++
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 46 +++++++++++++++++++
 4 files changed, 91 insertions(+)
 create mode 100644 sym/893efbfe-e93a-495c-a9da-126242bd1aab/.librepcb-sym
 create mode 100644 sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
 create mode 100644 sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/.librepcb-sym
 create mode 100644 sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp

diff --git a/sym/893efbfe-e93a-495c-a9da-126242bd1aab/.librepcb-sym b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
new file mode 100644
index 0000000..b1a71f2
--- /dev/null
+++ b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
@@ -0,0 +1,43 @@
+(librepcb_symbol 893efbfe-e93a-495c-a9da-126242bd1aab
+ (name "Logic AND Gate")
+ (description "")
+ (keywords "logic")
+ (author "DoppioT")
+ (version "0.1")
+ (created 2026-02-21T14:23:31Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin cb5061c2-75be-4133-8955-10a2e644e069 (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin c5b9ea74-aa31-4446-a44a-355aaf80f182 (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 65effad3-666e-4afc-8cd5-09065eca87fe (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 812f9339-3507-429a-82c7-43563490db58 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position 0.0 5.08) (angle -180.0))
+  (vertex (position 0.0 -5.08) (angle 0.0))
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+ (text 9e74abb0-8002-4b23-bf6d-b6745543ea50 (layer sym_names) (height 2.5)
+  (align left bottom) (position -5.08 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text 0fd5cbb3-5cad-4353-a458-7ab7580a1f22 (layer sym_values) (height 2.5)
+  (align left top) (position -5.08 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)
diff --git a/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/.librepcb-sym b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp
new file mode 100644
index 0000000..89a07db
--- /dev/null
+++ b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp
@@ -0,0 +1,46 @@
+(librepcb_symbol c3076a13-0a5c-405d-bd06-9b12969c3b45
+ (name "Logic NAND Gate")
+ (description "")
+ (keywords "logic")
+ (author "DoppioT")
+ (version "0.1")
+ (created 2026-02-21T14:46:04Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin e0fe871a-2b24-44d6-a339-ea4b6ce07760 (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 60125aea-d647-405f-ab9b-5dbb30c277ca (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 2a1f5008-d651-41a5-99f4-fc39ca9e3a32 (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 1.27)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon b56fc77b-34f2-4c4e-812d-bd7f692d852b (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position 0.0 5.08) (angle -180.0))
+  (vertex (position 0.0 -5.08) (angle 0.0))
+  (vertex (position -5.08 -5.08) (angle 0.0))
+  (vertex (position -5.08 5.08) (angle 0.0))
+  (vertex (position 0.0 5.08) (angle 0.0))
+ )
+ (circle c96cf267-eaac-4c9f-b6fc-ecb32867f2a0 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true) (diameter 1.27) (position 5.715 0.0)
+ )
+ (text 53c8ab0a-ed93-4798-a069-6fda37fad4c5 (layer sym_values) (height 2.5)
+  (align left top) (position -5.08 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+ (text 5193cfa6-ad6b-4a06-8e99-b881104bcece (layer sym_names) (height 2.5)
+  (align left bottom) (position -5.08 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+)

From 2ccf1cb4f8738be47577f20cc3fabb16ee76ce54 Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Sat, 21 Feb 2026 16:58:01 +0100
Subject: [PATCH 3/7] Component quad NAND gate

---
 .../.librepcb-cmp                             |  1 +
 .../component.lp                              | 94 +++++++++++++++++++
 2 files changed, 95 insertions(+)
 create mode 100644 cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/.librepcb-cmp
 create mode 100644 cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/component.lp

diff --git a/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/.librepcb-cmp b/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/.librepcb-cmp
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/.librepcb-cmp
@@ -0,0 +1 @@
+2
diff --git a/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/component.lp b/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/component.lp
new file mode 100644
index 0000000..50fbbea
--- /dev/null
+++ b/cmp/b98fcd4f-c29e-4027-b90f-5892153eddae/component.lp
@@ -0,0 +1,94 @@
+(librepcb_component b98fcd4f-c29e-4027-b90f-5892153eddae
+ (name "Logic NAND Gate Quad")
+ (description "")
+ (keywords "logic")
+ (author "DoppioT")
+ (version "0.1")
+ (created 2026-02-21T14:50:54Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (schematic_only false)
+ (default_value "{{MPN or DEVICE}}")
+ (prefix "U")
+ (signal 9002cb5d-3b14-4f25-8671-10222e06145e (name "A1") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 60ba6fd7-b966-4825-8bc7-07a86cffd2cd (name "B1") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 6fb4e36e-71d3-4696-af88-891d33c1c194 (name "Q1") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 11cffdc1-6b93-469d-97ee-8c964d93dc8c (name "A2") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal a4a5773a-d933-4218-899d-03aa6ccc874f (name "B2") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal d2b00efe-ffcf-4129-85ea-12048b08e956 (name "Q2") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 3fd4beee-f2e5-483c-a54a-95dbe5c96318 (name "A3") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 867b9f66-4ef6-401f-8c88-25a0df468a5c (name "B3") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 0b89c48a-5678-49ea-86d8-e3551c75f415 (name "Q3") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 64c67b6e-c6dd-4d2a-b25e-ad1901dd6a95 (name "A4") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 69538fdd-3319-4669-beed-d82eecd251b2 (name "B4") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 124e0505-1e26-42cc-b1c2-ff0b14f58e4a (name "Q4") (role passive)
+  (required false) (negated false) (clock false) (forced_net "")
+ )
+ (signal 70745ded-7f66-4c57-b83a-6d8594df829d (name "VCC") (role passive)
+  (required true) (negated false) (clock false) (forced_net "")
+ )
+ (signal d422e6df-37e6-4913-862a-e2e4a9cb0100 (name "GND") (role passive)
+  (required true) (negated false) (clock false) (forced_net "")
+ )
+ (variant 788ed1e2-2249-467d-89f9-cfb8786ff2c6 (norm "")
+  (name "default")
+  (description "")
+  (gate ce609c57-218b-4372-b0af-526d9c5240e4
+   (symbol c3076a13-0a5c-405d-bd06-9b12969c3b45)
+   (position 0.0 0.0) (rotation 0.0) (required false) (suffix "A")
+   (pin 2a1f5008-d651-41a5-99f4-fc39ca9e3a32 (signal 6fb4e36e-71d3-4696-af88-891d33c1c194) (text signal))
+   (pin 60125aea-d647-405f-ab9b-5dbb30c277ca (signal 60ba6fd7-b966-4825-8bc7-07a86cffd2cd) (text signal))
+   (pin e0fe871a-2b24-44d6-a339-ea4b6ce07760 (signal 9002cb5d-3b14-4f25-8671-10222e06145e) (text signal))
+  )
+  (gate aef48052-e5bf-4e48-b7ee-94d7baa228e0
+   (symbol c3076a13-0a5c-405d-bd06-9b12969c3b45)
+   (position 0.0 12.0) (rotation 0.0) (required false) (suffix "B")
+   (pin 2a1f5008-d651-41a5-99f4-fc39ca9e3a32 (signal d2b00efe-ffcf-4129-85ea-12048b08e956) (text signal))
+   (pin 60125aea-d647-405f-ab9b-5dbb30c277ca (signal a4a5773a-d933-4218-899d-03aa6ccc874f) (text signal))
+   (pin e0fe871a-2b24-44d6-a339-ea4b6ce07760 (signal 11cffdc1-6b93-469d-97ee-8c964d93dc8c) (text signal))
+  )
+  (gate 3457480a-97e9-4e87-817f-77529b33253d
+   (symbol c3076a13-0a5c-405d-bd06-9b12969c3b45)
+   (position 0.0 24.0) (rotation 0.0) (required false) (suffix "C")
+   (pin 2a1f5008-d651-41a5-99f4-fc39ca9e3a32 (signal 0b89c48a-5678-49ea-86d8-e3551c75f415) (text signal))
+   (pin 60125aea-d647-405f-ab9b-5dbb30c277ca (signal 867b9f66-4ef6-401f-8c88-25a0df468a5c) (text signal))
+   (pin e0fe871a-2b24-44d6-a339-ea4b6ce07760 (signal 3fd4beee-f2e5-483c-a54a-95dbe5c96318) (text signal))
+  )
+  (gate fc4df54a-de5f-43b5-9a64-770d77598b35
+   (symbol c3076a13-0a5c-405d-bd06-9b12969c3b45)
+   (position 0.0 36.0) (rotation 0.0) (required false) (suffix "D")
+   (pin 2a1f5008-d651-41a5-99f4-fc39ca9e3a32 (signal 124e0505-1e26-42cc-b1c2-ff0b14f58e4a) (text signal))
+   (pin 60125aea-d647-405f-ab9b-5dbb30c277ca (signal 69538fdd-3319-4669-beed-d82eecd251b2) (text signal))
+   (pin e0fe871a-2b24-44d6-a339-ea4b6ce07760 (signal 64c67b6e-c6dd-4d2a-b25e-ad1901dd6a95) (text signal))
+  )
+  (gate 3025efce-d8b2-4912-a2d9-a2c97405248c
+   (symbol 23fae272-31f0-4b0a-b7d3-62ae744035c4)
+   (position 0.0 48.0) (rotation 0.0) (required true) (suffix "E")
+   (pin 1d1aefbf-3d23-4b49-8a4d-bcdd79f2acd9 (signal 70745ded-7f66-4c57-b83a-6d8594df829d) (text signal))
+   (pin 31f1f05f-b019-4044-9e0c-c1ddc7adf5ed (signal d422e6df-37e6-4913-862a-e2e4a9cb0100) (text signal))
+  )
+ )
+)

From e44e2b2b17a5341b454c5cce719201e15514c24c Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Sun, 22 Feb 2026 20:29:05 +0100
Subject: [PATCH 4/7] Added descriptions for AND and NAND gates

---
 sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp | 2 +-
 sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
index b1a71f2..1e670cb 100644
--- a/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
+++ b/sym/893efbfe-e93a-495c-a9da-126242bd1aab/symbol.lp
@@ -1,6 +1,6 @@
 (librepcb_symbol 893efbfe-e93a-495c-a9da-126242bd1aab
  (name "Logic AND Gate")
- (description "")
+ (description "Dual input AND gate without power pins")
  (keywords "logic")
  (author "DoppioT")
  (version "0.1")
diff --git a/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp
index 89a07db..18e6733 100644
--- a/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp
+++ b/sym/c3076a13-0a5c-405d-bd06-9b12969c3b45/symbol.lp
@@ -1,6 +1,6 @@
 (librepcb_symbol c3076a13-0a5c-405d-bd06-9b12969c3b45
  (name "Logic NAND Gate")
- (description "")
+ (description "Dual input NAND gate without power pins")
  (keywords "logic")
  (author "DoppioT")
  (version "0.1")

From 7ebff8f42c6c0f83a145764a5bb106406c343485 Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Sun, 22 Feb 2026 20:30:53 +0100
Subject: [PATCH 5/7] Added symbols OR, NOR, XOR, XNOR

---
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 47 +++++++++++++++++
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 44 ++++++++++++++++
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 49 +++++++++++++++++
 .../.librepcb-sym                             |  1 +
 .../symbol.lp                                 | 52 +++++++++++++++++++
 8 files changed, 196 insertions(+)
 create mode 100644 sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/.librepcb-sym
 create mode 100644 sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
 create mode 100644 sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/.librepcb-sym
 create mode 100644 sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
 create mode 100644 sym/354b5355-93e3-4cc5-94af-6790fd15653b/.librepcb-sym
 create mode 100644 sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
 create mode 100644 sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/.librepcb-sym
 create mode 100644 sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp

diff --git a/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/.librepcb-sym b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
new file mode 100644
index 0000000..4191afa
--- /dev/null
+++ b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
@@ -0,0 +1,47 @@
+(librepcb_symbol 17b8215a-c25c-4645-b1ae-7e6d389f2384
+ (name "Logic NOR Gate")
+ (description "Dual input NOR gate without power pins")
+ (keywords "logic")
+ (author "Marco")
+ (version "0.1")
+ (created 2026-02-22T19:02:57Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin 4a8b0962-0561-4b57-9825-0860865913bd (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin a13426d3-cafd-48ca-b3e6-626f5f9af990 (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 485f9c32-8863-4e4a-9d45-81c533209dbf (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 1.27)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon e2a99bb8-c099-4baa-8d5b-232188d5edb0 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position -1.27 5.08) (angle -50.0))
+  (vertex (position 5.08 0.0) (angle -50.0))
+  (vertex (position -1.27 -5.08) (angle 0.0))
+  (vertex (position -6.35 -5.08) (angle 80.0))
+  (vertex (position -6.35 5.08) (angle 0.0))
+  (vertex (position -1.27 5.08) (angle 0.0))
+ )
+ (circle e7f22a41-a2bf-4f37-800a-8fff728bc453 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true) (diameter 1.27) (position 5.715 0.0)
+ )
+ (text 9f933317-8072-4c8e-b93a-bcd0ae6dc710 (layer sym_names) (height 2.5)
+  (align left bottom) (position -6.35 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text 39c6ee0e-fa9d-44ab-a377-a18a67c13e7f (layer sym_values) (height 2.5)
+  (align left top) (position -6.35 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)
diff --git a/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/.librepcb-sym b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
new file mode 100644
index 0000000..76cf112
--- /dev/null
+++ b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
@@ -0,0 +1,44 @@
+(librepcb_symbol 2e6398cf-84d2-4802-a71b-1a6cc1adba80
+ (name "Logic OR Gate")
+ (description "Dual input OR gate without power pins")
+ (keywords "logic")
+ (author "Marco")
+ (version "0.1")
+ (created 2026-02-22T18:54:47Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin 0e551ea0-956f-4b2d-9658-f412135371cd (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 38d90633-37da-4e08-a0a1-0bf1ce6260d7 (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 10be580a-77f3-4396-a5c8-25c097d78d99 (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 98b22684-c774-4f72-8d33-ce0e398e143e (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position -1.27 5.08) (angle -50.0))
+  (vertex (position 5.08 0.0) (angle -50.0))
+  (vertex (position -1.27 -5.08) (angle 0.0))
+  (vertex (position -6.35 -5.08) (angle 80.0))
+  (vertex (position -6.35 5.08) (angle 0.0))
+  (vertex (position -1.27 5.08) (angle 0.0))
+ )
+ (text baf66dfd-a259-4f91-9b35-bffc3767e9f2 (layer sym_names) (height 2.5)
+  (align left bottom) (position -6.35 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text ae5cfaac-1116-4431-bd90-d3be53c923ed (layer sym_values) (height 2.5)
+  (align left top) (position -6.35 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)
diff --git a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/.librepcb-sym b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
new file mode 100644
index 0000000..006cf82
--- /dev/null
+++ b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
@@ -0,0 +1,49 @@
+(librepcb_symbol 354b5355-93e3-4cc5-94af-6790fd15653b
+ (name "Logic XOR Gate")
+ (description "Dual input XOR gate without power pins")
+ (keywords "logic")
+ (author "Marco")
+ (version "0.1")
+ (created 2026-02-22T19:17:19Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 2.54)
+ (pin b83a3a82-af39-430e-8467-41c03a61446a (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 2.54)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 53489c91-5807-47ca-814d-1ea0c90cc54c (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 1.905)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 93eadd86-53da-4107-a033-62002ad54f7c (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 1.905)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 0a4e471f-cfe5-4ed8-97ca-95c698949407 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position -1.27 5.08) (angle -50.0))
+  (vertex (position 5.08 0.0) (angle -50.0))
+  (vertex (position -1.27 -5.08) (angle 0.0))
+  (vertex (position -6.35 -5.08) (angle 80.0))
+  (vertex (position -6.35 5.08) (angle 0.0))
+  (vertex (position -1.27 5.08) (angle 0.0))
+ )
+ (polygon 85626c78-0370-48d6-8b05-da90bbe0ee86 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area false)
+  (vertex (position -6.985 5.08) (angle -80.0))
+  (vertex (position -6.985 -5.08) (angle 0.0))
+ )
+ (text 5a9366ee-7622-489b-85f7-8a7f82342ea5 (layer sym_names) (height 2.5)
+  (align left bottom) (position -6.35 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text ed0f5fa8-b855-4117-abe7-6e36a79a058c (layer sym_values) (height 2.5)
+  (align left top) (position -6.35 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)
diff --git a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/.librepcb-sym b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/.librepcb-sym
new file mode 100644
index 0000000..0cfbf08
--- /dev/null
+++ b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/.librepcb-sym
@@ -0,0 +1 @@
+2
diff --git a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
new file mode 100644
index 0000000..f7e576f
--- /dev/null
+++ b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
@@ -0,0 +1,52 @@
+(librepcb_symbol be0593e0-3fdf-447a-b975-cecf0f28c1b8
+ (name "Logic XNOR Gate")
+ (description "Dual input XNOR gate without power pins")
+ (keywords "logic")
+ (author "Marco")
+ (version "0.1")
+ (created 2026-02-22T19:19:45Z)
+ (deprecated false)
+ (generated_by "")
+ (category 8e4af7b5-cbff-4409-9698-f2b545218075)
+ (grid_interval 0.635)
+ (pin 5c036d02-1b43-4fe9-b481-9dce2d5afb91 (name "A")
+  (position -7.62 2.54) (rotation 0.0) (length 1.905)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 3dcb7260-af75-4050-aad5-516bd26dce28 (name "B")
+  (position -7.62 -2.54) (rotation 0.0) (length 1.905)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (pin 4f128a7e-40d4-41f8-a75b-89de7a6a0553 (name "Q")
+  (position 7.62 0.0) (rotation 180.0) (length 1.27)
+  (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
+  (name_align left center)
+ )
+ (polygon 63a4561d-a0f9-478b-85f5-ee65498f49c2 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true)
+  (vertex (position -1.27 5.08) (angle -50.0))
+  (vertex (position 5.08 0.0) (angle -50.0))
+  (vertex (position -1.27 -5.08) (angle 0.0))
+  (vertex (position -6.35 -5.08) (angle 80.0))
+  (vertex (position -6.35 5.08) (angle 0.0))
+  (vertex (position -1.27 5.08) (angle 0.0))
+ )
+ (polygon 8f469430-aaef-4069-931a-09e243217ef8 (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area false)
+  (vertex (position -6.985 5.08) (angle -80.0))
+  (vertex (position -6.985 -5.08) (angle 0.0))
+ )
+ (circle 4515e853-5490-487a-8b82-915de99334ad (layer sym_outlines)
+  (width 0.2) (fill false) (grab_area true) (diameter 1.27) (position 5.715 0.0)
+ )
+ (text a40cff8a-5add-4044-bffa-5fac1d900612 (layer sym_names) (height 2.5)
+  (align left bottom) (position -6.35 5.08) (rotation 0.0) (lock false)
+  (value "{{NAME}}")
+ )
+ (text 241c3cba-f91a-4f88-bf79-6aad27f6f176 (layer sym_values) (height 2.5)
+  (align left top) (position -6.35 -5.08) (rotation 0.0) (lock false)
+  (value "{{VALUE}}")
+ )
+)

From ac2ec445427586be51932bfabf1575837e1405f4 Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Thu, 26 Feb 2026 22:24:52 +0100
Subject: [PATCH 6/7] Fixing authorship

---
 sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp | 2 +-
 sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp | 2 +-
 sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp | 2 +-
 sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp | 4 ++--
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
index 4191afa..568a569 100644
--- a/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
+++ b/sym/17b8215a-c25c-4645-b1ae-7e6d389f2384/symbol.lp
@@ -2,7 +2,7 @@
  (name "Logic NOR Gate")
  (description "Dual input NOR gate without power pins")
  (keywords "logic")
- (author "Marco")
+ (author "DoppioT")
  (version "0.1")
  (created 2026-02-22T19:02:57Z)
  (deprecated false)
diff --git a/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
index 76cf112..879ae4c 100644
--- a/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
+++ b/sym/2e6398cf-84d2-4802-a71b-1a6cc1adba80/symbol.lp
@@ -2,7 +2,7 @@
  (name "Logic OR Gate")
  (description "Dual input OR gate without power pins")
  (keywords "logic")
- (author "Marco")
+ (author "DoppioT")
  (version "0.1")
  (created 2026-02-22T18:54:47Z)
  (deprecated false)
diff --git a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
index 006cf82..9673ea3 100644
--- a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
+++ b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
@@ -2,7 +2,7 @@
  (name "Logic XOR Gate")
  (description "Dual input XOR gate without power pins")
  (keywords "logic")
- (author "Marco")
+ (author "DoppioT")
  (version "0.1")
  (created 2026-02-22T19:17:19Z)
  (deprecated false)
diff --git a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
index f7e576f..e9fc6a5 100644
--- a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
+++ b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
@@ -2,13 +2,13 @@
  (name "Logic XNOR Gate")
  (description "Dual input XNOR gate without power pins")
  (keywords "logic")
- (author "Marco")
+ (author "DoppioT")
  (version "0.1")
  (created 2026-02-22T19:19:45Z)
  (deprecated false)
  (generated_by "")
  (category 8e4af7b5-cbff-4409-9698-f2b545218075)
- (grid_interval 0.635)
+ (grid_interval 2.54)
  (pin 5c036d02-1b43-4fe9-b481-9dce2d5afb91 (name "A")
   (position -7.62 2.54) (rotation 0.0) (length 1.905)
   (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)

From 0b9eb4cd4c7aa3562a4b34ed199f4873dcd5e6ad Mon Sep 17 00:00:00 2001
From: DoppioT <43187250+DoppioT@users.noreply.github.com>
Date: Thu, 26 Feb 2026 23:05:27 +0100
Subject: [PATCH 7/7] Updated pin lenght in XOR and XNOR

---
 sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp | 4 ++--
 sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
index 9673ea3..a8c08ff 100644
--- a/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
+++ b/sym/354b5355-93e3-4cc5-94af-6790fd15653b/symbol.lp
@@ -15,12 +15,12 @@
   (name_align left center)
  )
  (pin 53489c91-5807-47ca-814d-1ea0c90cc54c (name "A")
-  (position -7.62 2.54) (rotation 0.0) (length 1.905)
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
   (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
   (name_align left center)
  )
  (pin 93eadd86-53da-4107-a033-62002ad54f7c (name "B")
-  (position -7.62 -2.54) (rotation 0.0) (length 1.905)
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
   (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
   (name_align left center)
  )
diff --git a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
index e9fc6a5..04202d8 100644
--- a/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
+++ b/sym/be0593e0-3fdf-447a-b975-cecf0f28c1b8/symbol.lp
@@ -10,12 +10,12 @@
  (category 8e4af7b5-cbff-4409-9698-f2b545218075)
  (grid_interval 2.54)
  (pin 5c036d02-1b43-4fe9-b481-9dce2d5afb91 (name "A")
-  (position -7.62 2.54) (rotation 0.0) (length 1.905)
+  (position -7.62 2.54) (rotation 0.0) (length 2.54)
   (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
   (name_align left center)
  )
  (pin 3dcb7260-af75-4050-aad5-516bd26dce28 (name "B")
-  (position -7.62 -2.54) (rotation 0.0) (length 1.905)
+  (position -7.62 -2.54) (rotation 0.0) (length 2.54)
   (name_position 3.81 0.0) (name_rotation 0.0) (name_height 2.5)
   (name_align left center)
  )