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Documentation: Undo asciidoctor formatting of table
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docs/src/man/man9/hm2_rpspi.9.adoc

Lines changed: 21 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -107,34 +107,40 @@ The base frequency is 250 MHz and the divider for SPI0/SPI1 scales using
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discrete factors. The following list specifies the *spiclk_rate* setting
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and the discrete SPI clock frequency (250 MHz / (2__n__) for _n_ > 1):
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.spiclk_rate and corresponding SPI clock frequency
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[%header,%autowidth,cols=">,>",grid=none,frame=ends]
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:table-frame: ends
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:table-grid: none
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:table-option: header
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.SPI clock rate and corresponding SPI clock frequency
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[cols="1,1,1"]
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|===
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^| _n_ ^| Frequency range (MHz)
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^| Divider
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^| spiclk_rate (kHz)
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^| actual frequency
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| 2 | 62.500 - 62.500
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| 2 | 62500 | 62.500 MHz
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| 3 | 41.667 - 41.667
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| 3 | 41667 | 41.667 MHz
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| 4 | 31.250 - 31.250
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| 4 | 31250 | 31.250 MHz
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121-
| 5 | 25.000 - 25.000
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| 5 | 25000 | 25.000 MHz
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| 6 | 20.834 - 20.833
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| 6 | 20834 | 20.833 MHz
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125-
| 7 | 17.858 - 17.857
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| 7 | 17858 | 17.857 MHz
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| 8 | 15.625 - 15.625
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| 8 | 15625 | 15.625 MHz
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| 9 | 13.889 - 13.889
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| 9 | 13889 | 13.889 MHz
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| 10 | 12.500 - 12.500
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| 10 | 12500 | 12.500 MHz
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| 11 | 11.364 - 11.364
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| 11 | 11364 | 11.364 MHz
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| 12 | 10.417 - 10.417
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| 12 | 10417 | 10.417 MHz
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| 13 | 9.616 - 9.615
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| 13 | 9616 | 9.615 MHz
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| 14+ | ....
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|===

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