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Merge pull request The-OpenROAD-Project#9614 from The-OpenROAD-Project-staging/update-sta
update sta for non-determinsm & verilog writer
2 parents d807840 + 79cd373 commit 4a0a240

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src/dbSta/test/hierwrite.vok

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -328,7 +328,7 @@ module GcdUnitDpathRTL_0x4d0fc71ead8d3d9e (a_mux_sel,
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.out(is_a_lt_b),
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.reset(reset));
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Mux_0x683fa1a418b072c9 a_mux (.clk(clk),
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.in_$000({req_msg_a[15],
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.\in_$000 ({req_msg_a[15],
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req_msg_a[14],
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req_msg_a[13],
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req_msg_a[12],
@@ -344,7 +344,7 @@ module GcdUnitDpathRTL_0x4d0fc71ead8d3d9e (a_mux_sel,
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req_msg_a[2],
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req_msg_a[1],
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req_msg_a[0]}),
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.in_$001({resp_msg[15],
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.\in_$001 ({resp_msg[15],
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resp_msg[14],
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resp_msg[13],
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resp_msg[12],
@@ -360,7 +360,7 @@ module GcdUnitDpathRTL_0x4d0fc71ead8d3d9e (a_mux_sel,
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resp_msg[2],
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resp_msg[1],
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resp_msg[0]}),
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.in_$002({\a_lt_b$in1[15] ,
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.\in_$002 ({\a_lt_b$in1[15] ,
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\a_lt_b$in1[14] ,
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\a_lt_b$in1[13] ,
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\a_lt_b$in1[12] ,
@@ -431,7 +431,7 @@ module GcdUnitDpathRTL_0x4d0fc71ead8d3d9e (a_mux_sel,
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\a_lt_b$in0[0] }),
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.reset(reset));
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Mux_0xdd6473406d1a99a b_mux (.clk(clk),
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.in_$000({\a_lt_b$in0[15] ,
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.\in_$000 ({\a_lt_b$in0[15] ,
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\a_lt_b$in0[14] ,
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\a_lt_b$in0[13] ,
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\a_lt_b$in0[12] ,
@@ -447,7 +447,7 @@ module GcdUnitDpathRTL_0x4d0fc71ead8d3d9e (a_mux_sel,
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\a_lt_b$in0[2] ,
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\a_lt_b$in0[1] ,
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\a_lt_b$in0[0] }),
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.in_$001({req_msg_b[15],
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.\in_$001 ({req_msg_b[15],
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req_msg_b[14],
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req_msg_b[13],
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req_msg_b[12],

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