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[NFC][Clang] Regenerate CHECKs - CodeGen/AArch64/neon-across.c
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‎clang/test/CodeGen/AArch64/neon-across.c‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ uint32_t test_vaddlv_u16(uint16x4_t a) {
4949
}
5050

5151
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s8
52-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {
52+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
5353
// CHECK-NEXT: entry:
5454
// CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> [[A]])
5555
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
@@ -60,7 +60,7 @@ int16_t test_vaddlvq_s8(int8x16_t a) {
6060
}
6161

6262
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s16
63-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
63+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
6464
// CHECK-NEXT: entry:
6565
// CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> [[A]])
6666
// CHECK-NEXT: ret i32 [[VADDLV_I]]
@@ -70,7 +70,7 @@ int32_t test_vaddlvq_s16(int16x8_t a) {
7070
}
7171

7272
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_s32
73-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
73+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
7474
// CHECK-NEXT: entry:
7575
// CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> [[A]])
7676
// CHECK-NEXT: ret i64 [[VADDLVQ_S32_I]]
@@ -80,7 +80,7 @@ int64_t test_vaddlvq_s32(int32x4_t a) {
8080
}
8181

8282
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u8
83-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
83+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
8484
// CHECK-NEXT: entry:
8585
// CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> [[A]])
8686
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
@@ -91,7 +91,7 @@ uint16_t test_vaddlvq_u8(uint8x16_t a) {
9191
}
9292

9393
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u16
94-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
94+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
9595
// CHECK-NEXT: entry:
9696
// CHECK-NEXT: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> [[A]])
9797
// CHECK-NEXT: ret i32 [[VADDLV_I]]
@@ -101,7 +101,7 @@ uint32_t test_vaddlvq_u16(uint16x8_t a) {
101101
}
102102

103103
// CHECK-LABEL: define {{[^@]+}}@test_vaddlvq_u32
104-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
104+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
105105
// CHECK-NEXT: entry:
106106
// CHECK-NEXT: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> [[A]])
107107
// CHECK-NEXT: ret i64 [[VADDLVQ_U32_I]]
@@ -155,7 +155,7 @@ uint16_t test_vmaxv_u16(uint16x4_t a) {
155155
}
156156

157157
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s8
158-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
158+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
159159
// CHECK-NEXT: entry:
160160
// CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> [[A]])
161161
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
@@ -166,7 +166,7 @@ int8_t test_vmaxvq_s8(int8x16_t a) {
166166
}
167167

168168
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s16
169-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
169+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
170170
// CHECK-NEXT: entry:
171171
// CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> [[A]])
172172
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i16
@@ -177,7 +177,7 @@ int16_t test_vmaxvq_s16(int16x8_t a) {
177177
}
178178

179179
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_s32
180-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
180+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
181181
// CHECK-NEXT: entry:
182182
// CHECK-NEXT: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> [[A]])
183183
// CHECK-NEXT: ret i32 [[VMAXVQ_S32_I]]
@@ -187,7 +187,7 @@ int32_t test_vmaxvq_s32(int32x4_t a) {
187187
}
188188

189189
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u8
190-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
190+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
191191
// CHECK-NEXT: entry:
192192
// CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> [[A]])
193193
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
@@ -198,7 +198,7 @@ uint8_t test_vmaxvq_u8(uint8x16_t a) {
198198
}
199199

200200
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u16
201-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
201+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
202202
// CHECK-NEXT: entry:
203203
// CHECK-NEXT: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> [[A]])
204204
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i16
@@ -209,7 +209,7 @@ uint16_t test_vmaxvq_u16(uint16x8_t a) {
209209
}
210210

211211
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_u32
212-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
212+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
213213
// CHECK-NEXT: entry:
214214
// CHECK-NEXT: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> [[A]])
215215
// CHECK-NEXT: ret i32 [[VMAXVQ_U32_I]]
@@ -263,7 +263,7 @@ uint16_t test_vminv_u16(uint16x4_t a) {
263263
}
264264

265265
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s8
266-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
266+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
267267
// CHECK-NEXT: entry:
268268
// CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> [[A]])
269269
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
@@ -274,7 +274,7 @@ int8_t test_vminvq_s8(int8x16_t a) {
274274
}
275275

276276
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s16
277-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
277+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
278278
// CHECK-NEXT: entry:
279279
// CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> [[A]])
280280
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i16
@@ -285,7 +285,7 @@ int16_t test_vminvq_s16(int16x8_t a) {
285285
}
286286

287287
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_s32
288-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
288+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
289289
// CHECK-NEXT: entry:
290290
// CHECK-NEXT: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> [[A]])
291291
// CHECK-NEXT: ret i32 [[VMINVQ_S32_I]]
@@ -295,7 +295,7 @@ int32_t test_vminvq_s32(int32x4_t a) {
295295
}
296296

297297
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u8
298-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
298+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
299299
// CHECK-NEXT: entry:
300300
// CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> [[A]])
301301
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
@@ -306,7 +306,7 @@ uint8_t test_vminvq_u8(uint8x16_t a) {
306306
}
307307

308308
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u16
309-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
309+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
310310
// CHECK-NEXT: entry:
311311
// CHECK-NEXT: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> [[A]])
312312
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i16
@@ -317,7 +317,7 @@ uint16_t test_vminvq_u16(uint16x8_t a) {
317317
}
318318

319319
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_u32
320-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
320+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
321321
// CHECK-NEXT: entry:
322322
// CHECK-NEXT: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> [[A]])
323323
// CHECK-NEXT: ret i32 [[VMINVQ_U32_I]]
@@ -371,7 +371,7 @@ uint16_t test_vaddv_u16(uint16x4_t a) {
371371
}
372372

373373
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s8
374-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
374+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
375375
// CHECK-NEXT: entry:
376376
// CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> [[A]])
377377
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
@@ -382,7 +382,7 @@ int8_t test_vaddvq_s8(int8x16_t a) {
382382
}
383383

384384
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s16
385-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
385+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
386386
// CHECK-NEXT: entry:
387387
// CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> [[A]])
388388
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i16
@@ -393,7 +393,7 @@ int16_t test_vaddvq_s16(int16x8_t a) {
393393
}
394394

395395
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_s32
396-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
396+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
397397
// CHECK-NEXT: entry:
398398
// CHECK-NEXT: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> [[A]])
399399
// CHECK-NEXT: ret i32 [[VADDVQ_S32_I]]
@@ -403,7 +403,7 @@ int32_t test_vaddvq_s32(int32x4_t a) {
403403
}
404404

405405
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u8
406-
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR1]] {
406+
// CHECK-SAME: (<16 x i8> noundef [[A:%.*]]) #[[ATTR0]] {
407407
// CHECK-NEXT: entry:
408408
// CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> [[A]])
409409
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
@@ -414,7 +414,7 @@ uint8_t test_vaddvq_u8(uint8x16_t a) {
414414
}
415415

416416
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u16
417-
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR1]] {
417+
// CHECK-SAME: (<8 x i16> noundef [[A:%.*]]) #[[ATTR0]] {
418418
// CHECK-NEXT: entry:
419419
// CHECK-NEXT: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> [[A]])
420420
// CHECK-NEXT: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i16
@@ -425,7 +425,7 @@ uint16_t test_vaddvq_u16(uint16x8_t a) {
425425
}
426426

427427
// CHECK-LABEL: define {{[^@]+}}@test_vaddvq_u32
428-
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR1]] {
428+
// CHECK-SAME: (<4 x i32> noundef [[A:%.*]]) #[[ATTR0]] {
429429
// CHECK-NEXT: entry:
430430
// CHECK-NEXT: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> [[A]])
431431
// CHECK-NEXT: ret i32 [[VADDVQ_U32_I]]
@@ -435,7 +435,7 @@ uint32_t test_vaddvq_u32(uint32x4_t a) {
435435
}
436436

437437
// CHECK-LABEL: define {{[^@]+}}@test_vmaxvq_f32
438-
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
438+
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {
439439
// CHECK-NEXT: entry:
440440
// CHECK-NEXT: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> [[A]])
441441
// CHECK-NEXT: ret float [[VMAXVQ_F32_I]]
@@ -445,7 +445,7 @@ float32_t test_vmaxvq_f32(float32x4_t a) {
445445
}
446446

447447
// CHECK-LABEL: define {{[^@]+}}@test_vminvq_f32
448-
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
448+
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {
449449
// CHECK-NEXT: entry:
450450
// CHECK-NEXT: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> [[A]])
451451
// CHECK-NEXT: ret float [[VMINVQ_F32_I]]
@@ -455,7 +455,7 @@ float32_t test_vminvq_f32(float32x4_t a) {
455455
}
456456

457457
// CHECK-LABEL: define {{[^@]+}}@test_vmaxnmvq_f32
458-
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
458+
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {
459459
// CHECK-NEXT: entry:
460460
// CHECK-NEXT: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> [[A]])
461461
// CHECK-NEXT: ret float [[VMAXNMVQ_F32_I]]
@@ -465,7 +465,7 @@ float32_t test_vmaxnmvq_f32(float32x4_t a) {
465465
}
466466

467467
// CHECK-LABEL: define {{[^@]+}}@test_vminnmvq_f32
468-
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
468+
// CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR0]] {
469469
// CHECK-NEXT: entry:
470470
// CHECK-NEXT: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> [[A]])
471471
// CHECK-NEXT: ret float [[VMINNMVQ_F32_I]]

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