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Anand
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FORMAT + TESTS PASS
1 parent d8db716 commit 510b67d

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5 files changed

+81
-86
lines changed

5 files changed

+81
-86
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‎src/common/m_derived_types.fpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ module m_derived_types
6060
real(kind(0d0)) :: ve2
6161
real(kind(0d0)) :: ve3
6262
real(kind(0d0)) :: u_in, v_in, w_in, u_out, v_out, w_out, pres_in, pres_out
63-
real(kind(0d0)), dimension(num_fluids_max) :: alpha_rho_in, alpha_in
63+
real(kind(0d0)), dimension(num_fluids_max) :: alpha_rho_in, alpha_in
6464
logical :: grcbc_in, grcbc_out, grcbc_vel_out
6565

6666
end type int_bounds_info

‎src/simulation/m_cbc.fpp‎

Lines changed: 51 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -132,33 +132,30 @@ module m_cbc
132132
integer :: dj
133133
integer :: bcxb, bcxe, bcyb, bcye, bczb, bcze
134134
integer :: cbc_dir, cbc_loc
135-
!$acc declare create(dj, bcxb, bcxe, bcyb, bcye, bczb, bcze, cbc_dir, cbc_loc)
135+
!$acc declare create(dj, bcxb, bcxe, bcyb, bcye, bczb, bcze, cbc_dir, cbc_loc)
136136

137137
real(kind(0d0)) :: ux_in, ux_out, vx_in, vx_out, wx_in, wx_out, presx_in, presx_out, Delx_in, Delx_out
138-
138+
139139
real(kind(0d0)) :: uy_in, uy_out, vy_in, vy_out, wy_in, wy_out, presy_in, presy_out, Dely_in, Dely_out
140-
140+
141141
real(kind(0d0)) :: uz_in, uz_out, vz_in, vz_out, wz_in, wz_out, presz_in, presz_out, Delz_in, Delz_out
142-
142+
143143
!$acc declare create(ux_in, ux_out, vx_in, vx_out, wx_in, wx_out, presx_in, presx_out, Delx_in, Delx_out)
144144
!$acc declare create(uy_in, uy_out, vy_in, vy_out, wy_in, wy_out, presy_in, presy_out, Dely_in, Dely_out)
145145
!$acc declare create(uz_in, uz_out, vz_in, vz_out, wz_in, wz_out, presz_in, presz_out, Delz_in, Delz_out)
146146

147-
148147
#ifdef CRAY_ACC_WAR
149148
@:CRAY_DECLARE_GLOBAL(real(kind(0d0)), dimension(:, :, :), alpha_rhox_in, alphax_in)
150149
@:CRAY_DECLARE_GLOBAL(real(kind(0d0)), dimension(:, :, :), alpha_rhoy_in, alphay_in)
151150
@:CRAY_DECLARE_GLOBAL(real(kind(0d0)), dimension(:, :, :), alpha_rhoz_in, alphaz_in)
152-
!$acc declare link(alpha_rhox_in, alphax_in, alpha_rhoy_in, alphay_in, alpha_rhoz_in, alphaz_in)
151+
!$acc declare link(alpha_rhox_in, alphax_in, alpha_rhoy_in, alphay_in, alpha_rhoz_in, alphaz_in)
153152
#else
154-
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhox_in, alphax_in
155-
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhoy_in, alphay_in
156-
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhoz_in, alphaz_in
157-
!$acc declare create(alpha_rhox_in, alphax_in, alpha_rhoy_in, alphay_in, alpha_rhoz_in, alphaz_in)
153+
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhox_in, alphax_in
154+
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhoy_in, alphay_in
155+
real(kind(0d0)), allocatable, dimension(:) :: alpha_rhoz_in, alphaz_in
156+
!$acc declare create(alpha_rhox_in, alphax_in, alpha_rhoy_in, alphay_in, alpha_rhoz_in, alphaz_in)
158157
#endif
159158

160-
161-
162159
#ifndef CRAY_ACC_WAR
163160
!$acc declare create(q_prim_rsx_vf, q_prim_rsy_vf, q_prim_rsz_vf, F_rsx_vf, F_src_rsx_vf,flux_rsx_vf, flux_src_rsx_vf, &
164161
!$acc F_rsy_vf, F_src_rsy_vf,flux_rsy_vf, flux_src_rsy_vf, F_rsz_vf, F_src_rsz_vf,flux_rsz_vf, flux_src_rsz_vf,Re, &
@@ -456,39 +453,39 @@ contains
456453

457454
#:for CBC_DIR, XYZ in [(1, 'x'), (2, 'y'), (3, 'z')]
458455

459-
if(${CBC_DIR}$ == 1) then
460-
u${XYZ}$_in = bc_${XYZ}$%u_in
461-
v${XYZ}$_in = bc_${XYZ}$%v_in
462-
w${XYZ}$_in = bc_${XYZ}$%w_in
456+
if (${CBC_DIR}$ == 1) then
457+
u${XYZ}$_in = bc_${XYZ}$%u_in
458+
v${XYZ}$_in = bc_${XYZ}$%v_in
459+
w${XYZ}$_in = bc_${XYZ}$%w_in
463460
u${XYZ}$_out = bc_${XYZ}$%u_out
464-
v${XYZ}$_out = bc_${XYZ}$%v_out
461+
v${XYZ}$_out = bc_${XYZ}$%v_out
465462
w${XYZ}$_out = bc_${XYZ}$%w_out
466463
Del${XYZ}$_in = maxval(dx)
467464
Del${XYZ}$_out = maxval(dx)
468-
else if(${CBC_DIR}$ == 2) then
465+
else if (${CBC_DIR}$ == 2) then
469466

470-
u${XYZ}$_in = bc_${XYZ}$%v_in
471-
v${XYZ}$_in = bc_${XYZ}$%u_in
472-
w${XYZ}$_in = bc_${XYZ}$%w_in
467+
u${XYZ}$_in = bc_${XYZ}$%v_in
468+
v${XYZ}$_in = bc_${XYZ}$%u_in
469+
w${XYZ}$_in = bc_${XYZ}$%w_in
473470
u${XYZ}$_out = bc_${XYZ}$%v_out
474-
v${XYZ}$_out = bc_${XYZ}$%u_out
475-
w${XYZ}$_out = bc_${XYZ}$%w_out
476-
if(n > 0) then
471+
v${XYZ}$_out = bc_${XYZ}$%u_out
472+
w${XYZ}$_out = bc_${XYZ}$%w_out
473+
if (n > 0) then
477474
Del${XYZ}$_in = maxval(dy)
478475
Del${XYZ}$_out = maxval(dy)
479476
end if
480-
else if(${CBC_DIR}$ == 3) then
481-
u${XYZ}$_in = bc_${XYZ}$%w_in
482-
v${XYZ}$_in = bc_${XYZ}$%u_in
483-
w${XYZ}$_in = bc_${XYZ}$%v_in
477+
else if (${CBC_DIR}$ == 3) then
478+
u${XYZ}$_in = bc_${XYZ}$%w_in
479+
v${XYZ}$_in = bc_${XYZ}$%u_in
480+
w${XYZ}$_in = bc_${XYZ}$%v_in
484481
u${XYZ}$_out = bc_${XYZ}$%w_out
485-
v${XYZ}$_out = bc_${XYZ}$%u_out
486-
w${XYZ}$_out = bc_${XYZ}$%v_out
487-
if(p > 0) then
482+
v${XYZ}$_out = bc_${XYZ}$%u_out
483+
w${XYZ}$_out = bc_${XYZ}$%v_out
484+
if (p > 0) then
488485
Del${XYZ}$_in = maxval(dz)
489486
Del${XYZ}$_out = maxval(dz)
490487
end if
491-
end if
488+
end if
492489

493490
pres${XYZ}$_in = bc_${XYZ}$%pres_in
494491
pres${XYZ}$_out = bc_${XYZ}$%pres_out
@@ -499,9 +496,8 @@ contains
499496
!$acc update device(u${XYZ}$_in, v${XYZ}$_in, w${XYZ}$_in, u${XYZ}$_out, v${XYZ}$_out, w${XYZ}$_out)
500497
!$acc update device(pres${XYZ}$_in, pres${XYZ}$_out, alpha_rho${XYZ}$_in, alpha${XYZ}$_in)
501498
!$acc update device(Del${XYZ}_in, Del${XYZ}_out)
502-
503-
#:endfor
504499

500+
#:endfor
505501

506502
end subroutine s_initialize_cbc_module
507503

@@ -939,39 +935,39 @@ contains
939935
lambda(2) = vel(dir_idx(1))
940936
lambda(3) = vel(dir_idx(1)) + c
941937

942-
Ma = vel(dir_idx(1)) / c
938+
Ma = vel(dir_idx(1))/c
943939

944940
if ((cbc_loc == -1 .and. bc${XYZ}$b == -5) .or. (cbc_loc == 1 .and. bc${XYZ}$e == -5)) then
945941
call s_compute_slip_wall_L(lambda, L, rho, c, mf, dalpha_rho_ds, dpres_ds, dvel_ds, dadv_ds)
946942
else if ((cbc_loc == -1 .and. bc${XYZ}$b == -6) .or. (cbc_loc == 1 .and. bc${XYZ}$e == -6)) then
947943
call s_compute_nonreflecting_subsonic_buffer_L(lambda, L, rho, c, mf, dalpha_rho_ds, dpres_ds, dvel_ds, dadv_ds)
948944
else if ((cbc_loc == -1 .and. bc${XYZ}$b == -7) .or. (cbc_loc == 1 .and. bc${XYZ}$e == -7)) then
949945
call s_compute_nonreflecting_subsonic_inflow_L(lambda, L, rho, c, mf, dalpha_rho_ds, dpres_ds, dvel_ds, dadv_ds)
950-
951-
if(bc_${XYZ}$%grcbc_in) then
952-
!$acc loop seq
946+
947+
if (bc_${XYZ}$%grcbc_in) then
948+
!$acc loop seq
953949
do i = 2, momxb
954-
L(2) = c**3d0 * Ma * (alpha_rho(i-1) - alpha_rho${XYZ}$_in(i-1)) / Del${XYZ}$_in - c * Ma * (pres - pres${XYZ}$_in) / Del${XYZ}$_in
950+
L(2) = c**3d0*Ma*(alpha_rho(i - 1) - alpha_rho${XYZ}$_in(i - 1))/Del${XYZ}$_in - c*Ma*(pres - pres${XYZ}$_in)/Del${XYZ}$_in
955951
end do
956-
if(n > 0) then
957-
L(momxb + 1) = c * Ma * (vel(dir_idx(2)) - v${XYZ}$_in) / Del${XYZ}$_in
958-
if(p > 0) then
959-
L(momxb + 2) = c * Ma * (vel(dir_idx(3)) - w${XYZ}$_in) / Del${XYZ}$_in
960-
end if
961-
end if
962-
!$acc loop seq
952+
if (n > 0) then
953+
L(momxb + 1) = c*Ma*(vel(dir_idx(2)) - v${XYZ}$_in)/Del${XYZ}$_in
954+
if (p > 0) then
955+
L(momxb + 2) = c*Ma*(vel(dir_idx(3)) - w${XYZ}$_in)/Del${XYZ}$_in
956+
end if
957+
end if
958+
!$acc loop seq
963959
do i = E_idx, advxe - 1
964-
L(i) = c * Ma * (adv(i + 1 - E_idx) - alpha${XYZ}$_in(i + 1 - E_idx)) / Del${XYZ}$_in
965-
end do
966-
L(advxe) = rho*c**2d0*(1d0 + Ma)*(vel(dir_idx(1)) + u${XYZ}$_in * sign(1, cbc_loc)) / Del${XYZ}$_in + c*(1d0 + Ma)*(pres - pres${XYZ}$_in) / Del${XYZ}$_in
967-
end if
960+
L(i) = c*Ma*(adv(i + 1 - E_idx) - alpha${XYZ}$_in(i + 1 - E_idx))/Del${XYZ}$_in
961+
end do
962+
L(advxe) = rho*c**2d0*(1d0 + Ma)*(vel(dir_idx(1)) + u${XYZ}$_in*sign(1, cbc_loc))/Del${XYZ}$_in + c*(1d0 + Ma)*(pres - pres${XYZ}$_in)/Del${XYZ}$_in
963+
end if
968964
else if ((cbc_loc == -1 .and. bc${XYZ}$b == -8) .or. (cbc_loc == 1 .and. bc${XYZ}$e == -8)) then
969965
call s_compute_nonreflecting_subsonic_outflow_L(lambda, L, rho, c, mf, dalpha_rho_ds, dpres_ds, dvel_ds, dadv_ds)
970-
971-
if(bc_${XYZ}$%grcbc_out) then
972-
L(advxe) = c*(1d0 - Ma)*(pres - pres${XYZ}$_out) / Del${XYZ}$_out
973-
if(bc_${XYZ}$%grcbc_vel_out) then
974-
L(advxe) = L(advxe) + rho*c**2d0*(1d0 - Ma)*(vel(dir_idx(1)) + u${XYZ}$_out * sign(1, cbc_loc)) / Del${XYZ}$_out
966+
967+
if (bc_${XYZ}$%grcbc_out) then
968+
L(advxe) = c*(1d0 - Ma)*(pres - pres${XYZ}$_out)/Del${XYZ}$_out
969+
if (bc_${XYZ}$%grcbc_vel_out) then
970+
L(advxe) = L(advxe) + rho*c**2d0*(1d0 - Ma)*(vel(dir_idx(1)) + u${XYZ}$_out*sign(1, cbc_loc))/Del${XYZ}$_out
975971
end if
976972
end if
977973

‎src/simulation/m_global_parameters.fpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -719,15 +719,15 @@ contains
719719
integral(i)%ymax = dflt_real
720720
end do
721721

722-
bc_x%grcbc_in = .false.
722+
bc_x%grcbc_in = .false.
723723
bc_x%grcbc_out = .false.
724724
bc_x%grcbc_vel_out = .false.
725725

726-
bc_y%grcbc_in = .false.
726+
bc_y%grcbc_in = .false.
727727
bc_y%grcbc_out = .false.
728728
bc_y%grcbc_vel_out = .false.
729729

730-
bc_z%grcbc_in = .false.
730+
bc_z%grcbc_in = .false.
731731
bc_z%grcbc_out = .false.
732732
bc_z%grcbc_vel_out = .false.
733733

‎src/simulation/m_mpi_proxy.fpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -228,10 +228,10 @@ contains
228228
& 'bc_x%pres_in','bc_x%pres_out', &
229229
& 'bc_y%vb1','bc_y%vb2','bc_y%vb3','bc_y%ve1','bc_y%ve2','bc_y%ve3', &
230230
& 'bc_y%u_in','bc_y%v_in','bc_y%w_in','bc_y%u_out','bc_y%v_out','bc_y%w_out', &
231-
& 'bc_y%pres_in','bc_y%pres_out', &
231+
& 'bc_y%pres_in','bc_y%pres_out', &
232232
& 'bc_z%vb1','bc_z%vb2','bc_z%vb3','bc_z%ve1','bc_z%ve2','bc_z%ve3', &
233233
& 'bc_z%u_in','bc_z%v_in','bc_z%w_in','bc_z%u_out','bc_z%v_out','bc_z%w_out', &
234-
& 'bc_z%pres_in','bc_z%pres_out', &
234+
& 'bc_z%pres_in','bc_z%pres_out', &
235235
& 'x_domain%beg', 'x_domain%end', 'y_domain%beg', 'y_domain%end', &
236236
& 'z_domain%beg', 'z_domain%end', 't_stop', 't_save', 'cfl_target']
237237
call MPI_BCAST(${VAR}$, 1, MPI_DOUBLE_PRECISION, 0, MPI_COMM_WORLD, ierr)
@@ -257,9 +257,9 @@ contains
257257
258258
do i = 1, num_fluids_max
259259
#:for VAR in ['bc_x%alpha_rho_in','bc_x%alpha_in','bc_y%alpha_rho_in','bc_y%alpha_in','bc_z%alpha_rho_in','bc_z%alpha_in']
260-
call MPI_BCAST(${VAR}$(i), 1, MPI_DOUBLE_PRECISION, 0, MPI_COMM_WORLD, ierr )
260+
call MPI_BCAST(${VAR}$ (i), 1, MPI_DOUBLE_PRECISION, 0, MPI_COMM_WORLD, ierr)
261261
#:endfor
262-
end do
262+
end do
263263
264264
do i = 1, num_ibs
265265
#:for VAR in [ 'radius', 'length_x', 'length_y', &

‎toolchain/mfc/run/case_dicts.py‎

Lines changed: 22 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -248,31 +248,30 @@ def analytic(self):
248248
SIMULATION[f'patch_ib({ib_id})%{cmp}_centroid'] = ParamType.REAL
249249
SIMULATION[f'patch_ib({ib_id})%length_{cmp}'] = ParamType.REAL
250250

251-
for cmp in ["x", "y", "z"]:
252-
SIMULATION[f'bc_{cmp}%beg'] = ParamType.INT
253-
SIMULATION[f'bc_{cmp}%end'] = ParamType.INT
254-
SIMULATION[f'bc_{cmp}%vb1'] = ParamType.REAL
255-
SIMULATION[f'bc_{cmp}%vb2'] = ParamType.REAL
256-
SIMULATION[f'bc_{cmp}%vb3'] = ParamType.REAL
257-
SIMULATION[f'bc_{cmp}%ve1'] = ParamType.REAL
258-
SIMULATION[f'bc_{cmp}%ve2'] = ParamType.REAL
259-
SIMULATION[f'bc_{cmp}%ve3'] = ParamType.REAL
260-
SIMULATION[f'bc_{cmp}%u_in'] = ParamType.REAL
261-
SIMULATION[f'bc_{cmp}%v_in'] = ParamType.REAL
262-
SIMULATION[f'bc_{cmp}%w_in'] = ParamType.REAL
263-
SIMULATION[f'bc_{cmp}%u_out'] = ParamType.REAL
264-
SIMULATION[f'bc_{cmp}%v_out'] = ParamType.REAL
265-
SIMULATION[f'bc_{cmp}%w_out'] = ParamType.REAL
266-
SIMULATION[f'bc_{cmp}%pres_in'] = ParamType.REAL
267-
SIMULATION[f'bc_{cmp}%pres_out'] = ParamType.REAL
268-
SIMULATION[f'bc_{cmp}%grcbc_in'] = ParamType.LOG
269-
SIMULATION[f'bc_{cmp}%grcbc_out'] = ParamType.LOG
270-
SIMULATION[f'bc_{cmp}%grcbc_vel_out'] = ParamType.LOG
251+
for cmp in ["x", "y", "z"]:
252+
SIMULATION[f'bc_{cmp}%beg'] = ParamType.INT
253+
SIMULATION[f'bc_{cmp}%end'] = ParamType.INT
254+
SIMULATION[f'bc_{cmp}%vb1'] = ParamType.REAL
255+
SIMULATION[f'bc_{cmp}%vb2'] = ParamType.REAL
256+
SIMULATION[f'bc_{cmp}%vb3'] = ParamType.REAL
257+
SIMULATION[f'bc_{cmp}%ve1'] = ParamType.REAL
258+
SIMULATION[f'bc_{cmp}%ve2'] = ParamType.REAL
259+
SIMULATION[f'bc_{cmp}%ve3'] = ParamType.REAL
260+
SIMULATION[f'bc_{cmp}%u_in'] = ParamType.REAL
261+
SIMULATION[f'bc_{cmp}%v_in'] = ParamType.REAL
262+
SIMULATION[f'bc_{cmp}%w_in'] = ParamType.REAL
263+
SIMULATION[f'bc_{cmp}%u_out'] = ParamType.REAL
264+
SIMULATION[f'bc_{cmp}%v_out'] = ParamType.REAL
265+
SIMULATION[f'bc_{cmp}%w_out'] = ParamType.REAL
266+
SIMULATION[f'bc_{cmp}%pres_in'] = ParamType.REAL
267+
SIMULATION[f'bc_{cmp}%pres_out'] = ParamType.REAL
268+
SIMULATION[f'bc_{cmp}%grcbc_in'] = ParamType.LOG
269+
SIMULATION[f'bc_{cmp}%grcbc_out'] = ParamType.LOG
270+
SIMULATION[f'bc_{cmp}%grcbc_vel_out'] = ParamType.LOG
271271

272272
for int_id in range(1, 10+1):
273-
for cmp in ["x", "y", "z"]:
274-
SIMULATION[f"bc_{cmp}%alpha_rho_in({int_id})"] = ParamType.REAL
275-
SIMULATION[f"bc_{cmp}%alpha_in({int_id})"] = ParamType.REAL
273+
SIMULATION[f"bc_{cmp}%alpha_rho_in({int_id})"] = ParamType.REAL
274+
SIMULATION[f"bc_{cmp}%alpha_in({int_id})"] = ParamType.REAL
276275

277276
for var in ["k", "w", "p", "g"]:
278277
SIMULATION[f'{var}_{cmp}'] = ParamType.REAL

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