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lines changed Original file line number Diff line number Diff line change @@ -100,25 +100,9 @@ static void __attribute__((unused)) CG022_write_fifo_post_bind(const uint8_t *da
100100
101101static void __attribute__ ((unused)) CG022_LT8910_init()
102102{
103- // Hardware RESET via PB8 (CYRF_RST_pin) — replicates stock TX behavior.
104- // Stock TX (capture 02a) drives RET LOW for 500ms before any SPI:
105- // RET=0 at t=60.275ms, RET=1 at t=561.317ms, first SPI at t=567.180ms.
106- // The hardware RESET initializes the LT8910's SPI interface including the
107- // MISO output driver, which may not be activated by software reset alone.
108- // CYRF_RST_pin (PB8) is available because the CYRF6936 internal module
109- // is not used during CG022 protocol operation.
110- // Wire PB8 → LT8910 RET pin; remove the 10k pullup from RET.
111- // PKT pin is left floating (matching stock TX where PKT is unconnected).
112- #ifdef CYRF_RST_HI
113- CYRF_RST_LO; // Drive RET LOW — begin hardware reset
114- delayMilliseconds (480 ); // Hold LOW for ~480ms to target ~500ms in capture
115- CYRF_RST_HI; // Release RET HIGH — chip exits reset
116- delayMilliseconds (6 ); // 6ms settling before first SPI (stock TX: 5.9ms)
117- #else
118- // Fallback: software reset if CYRF_RST_HI is not defined (e.g. AVR boards).
103+ // Software reset only. RET is held HIGH via a 10k pullup on the LT8910 board.
119104 LT8910_WriteReg (LT8910_REG_CHANNEL, LT8910_CHIP_RST);
120105 delayMilliseconds (100 );
121- #endif
122106
123107 // Write all init registers from stock TX capture.
124108 // Stock TX (02b) has ~228µs gaps between every SPI transaction.
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