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Merge branch 'openwrt:master' into master
2 parents 8add5bb + 5429411 commit 58450bb

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10 files changed

+116
-31
lines changed

10 files changed

+116
-31
lines changed

‎target/linux/mvebu/Makefile‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,7 @@ BOARDNAME:=Marvell EBU Armada
99
FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part legacy-sdcard targz
1010
SUBTARGETS:=cortexa9 cortexa53 cortexa72
1111

12-
KERNEL_PATCHVER:=5.10
13-
KERNEL_TESTING_PATCHVER:=5.15
12+
KERNEL_PATCHVER:=5.15
1413

1514
include $(INCLUDE_DIR)/target.mk
1615

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1401,7 +1401,7 @@ static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, v
14011401
case FIB_EVENT_ENTRY_REPLACE:
14021402
case FIB_EVENT_ENTRY_APPEND:
14031403
case FIB_EVENT_ENTRY_DEL:
1404-
pr_debug("%s: FIB_ENTRY ADD/DELL, event %ld\n", __func__, event);
1404+
pr_debug("%s: FIB_ENTRY ADD/DEL, event %ld\n", __func__, event);
14051405
if (info->family == AF_INET) {
14061406
struct fib_entry_notifier_info *fen_info = ptr;
14071407

@@ -1420,15 +1420,15 @@ static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, v
14201420

14211421
} else if (info->family == AF_INET6) {
14221422
struct fib6_entry_notifier_info *fen6_info = ptr;
1423-
pr_warn("%s: FIB_RULE ADD/DELL for IPv6 not supported\n", __func__);
1423+
pr_warn("%s: FIB_RULE ADD/DEL for IPv6 not supported\n", __func__);
14241424
kfree(fib_work);
14251425
return NOTIFY_DONE;
14261426
}
14271427
break;
14281428

14291429
case FIB_EVENT_RULE_ADD:
14301430
case FIB_EVENT_RULE_DEL:
1431-
pr_debug("%s: FIB_RULE ADD/DELL, event: %ld\n", __func__, event);
1431+
pr_debug("%s: FIB_RULE ADD/DEL, event: %ld\n", __func__, event);
14321432
memcpy(&fib_work->fr_info, ptr, sizeof(fib_work->fr_info));
14331433
fib_rule_get(fib_work->fr_info.rule);
14341434
break;

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/debugfs.c‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -482,10 +482,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
482482

483483
debugfs_create_x32("storm_rate_bc", 0644, port_dir,
484484
(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
485-
486-
debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
487-
(u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL
488-
+ (port << 2)));
489485
} else {
490486
debugfs_create_x32("storm_rate_uc", 0644, port_dir,
491487
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
@@ -495,10 +491,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
495491

496492
debugfs_create_x32("storm_rate_bc", 0644, port_dir,
497493
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
498-
499-
debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
500-
(u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
501-
+ (port << 2)));
502494
}
503495

504496
debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1063,10 +1063,7 @@ static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
10631063
priv->ports[port].enable = true;
10641064

10651065
/* enable inner tagging on egress, do not keep any tags */
1066-
if (priv->family_id == RTL9310_FAMILY_ID)
1067-
sw_w32(BIT(4), priv->r->vlan_port_tag_sts_ctrl + (port << 2));
1068-
else
1069-
sw_w32(1, priv->r->vlan_port_tag_sts_ctrl + (port << 2));
1066+
priv->r->vlan_port_keep_tag_set(port, 0, 1);
10701067

10711068
if (dsa_is_cpu_port(ds, port))
10721069
return 0;

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.c‎

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,22 @@
66

77
#include "rtl83xx.h"
88

9+
#define RTL838X_VLAN_PORT_TAG_STS_UNTAG 0x0
10+
#define RTL838X_VLAN_PORT_TAG_STS_TAGGED 0x1
11+
#define RTL838X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
12+
13+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE 0xA530
14+
/* port 0-28 */
15+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL(port) \
16+
RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
17+
18+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(11,10)
19+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(9,8)
20+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(7,6)
21+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(5,4)
22+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(3,2)
23+
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(1,0)
24+
925
extern struct mutex smi_lock;
1026

1127
// see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c
@@ -1612,6 +1628,15 @@ static int rtl838x_l3_setup(struct rtl838x_switch_priv *priv)
16121628
return 0;
16131629
}
16141630

1631+
void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
1632+
{
1633+
sw_w32(FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
1634+
keep_outer ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG) |
1635+
FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
1636+
keep_inner ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG),
1637+
RTL838X_VLAN_PORT_TAG_STS_CTRL(port));
1638+
}
1639+
16151640
void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
16161641
{
16171642
if (type == PBVLAN_TYPE_INNER)
@@ -1742,7 +1767,7 @@ const struct rtl838x_reg rtl838x_reg = {
17421767
.write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
17431768
.read_cam = rtl838x_read_cam,
17441769
.write_cam = rtl838x_write_cam,
1745-
.vlan_port_tag_sts_ctrl = RTL838X_VLAN_PORT_TAG_STS_CTRL,
1770+
.vlan_port_keep_tag_set = rtl838x_vlan_port_keep_tag_set,
17461771
.vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set,
17471772
.vlan_port_pvid_set = rtl838x_vlan_port_pvid_set,
17481773
.trk_mbr_ctr = rtl838x_trk_mbr_ctr,

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.h‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -69,29 +69,24 @@
6969
#define RTL838X_VLAN_PORT_EGR_FLTR (0x3A84)
7070
#define RTL838X_VLAN_PORT_PB_VLAN (0x3C00)
7171
#define RTL838X_VLAN_PORT_IGR_FLTR (0x3A7C)
72-
#define RTL838X_VLAN_PORT_TAG_STS_CTRL (0xA530)
7372

7473
#define RTL839X_VLAN_PROFILE(idx) (0x25C0 + (((idx) << 3)))
7574
#define RTL839X_VLAN_CTRL (0x26D4)
7675
#define RTL839X_VLAN_PORT_PB_VLAN (0x26D8)
7776
#define RTL839X_VLAN_PORT_IGR_FLTR (0x27B4)
7877
#define RTL839X_VLAN_PORT_EGR_FLTR (0x27C4)
79-
#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
80-
#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
8178

8279
#define RTL930X_VLAN_PROFILE_SET(idx) (0x9c60 + (((idx) * 20)))
8380
#define RTL930X_VLAN_CTRL (0x82D4)
8481
#define RTL930X_VLAN_PORT_PB_VLAN (0x82D8)
8582
#define RTL930X_VLAN_PORT_IGR_FLTR (0x83C0)
8683
#define RTL930X_VLAN_PORT_EGR_FLTR (0x83C8)
87-
#define RTL930X_VLAN_PORT_TAG_STS_CTRL (0xCE24)
8884

8985
#define RTL931X_VLAN_PROFILE_SET(idx) (0x9800 + (((idx) * 28)))
9086
#define RTL931X_VLAN_CTRL (0x94E4)
9187
#define RTL931X_VLAN_PORT_IGR_CTRL (0x94E8)
9288
#define RTL931X_VLAN_PORT_IGR_FLTR (0x96B4)
9389
#define RTL931X_VLAN_PORT_EGR_FLTR (0x96C4)
94-
#define RTL931X_VLAN_PORT_TAG_CTRL (0x4860)
9590

9691
/* Table access registers */
9792
#define RTL838X_TBL_ACCESS_CTRL_0 (0x6914)
@@ -980,6 +975,7 @@ struct rtl838x_reg {
980975
void (*vlan_profile_setup)(int profile);
981976
void (*vlan_port_pvidmode_set)(int port, enum pbvlan_type type, enum pbvlan_mode mode);
982977
void (*vlan_port_pvid_set)(int port, enum pbvlan_type type, int pvid);
978+
void (*vlan_port_keep_tag_set)(int port, bool keep_outer, bool keep_inner);
983979
void (*set_vlan_igr_filter)(int port, enum igr_filter state);
984980
void (*set_vlan_egr_filter)(int port, enum egr_filter state);
985981
void (*enable_learning)(int port, bool enable);
@@ -1005,8 +1001,6 @@ struct rtl838x_reg {
10051001
void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
10061002
u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
10071003
void (*write_cam)(int idx, struct rtl838x_l2_entry *e);
1008-
int vlan_port_tag_sts_ctrl;
1009-
int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
10101004
int (*trk_mbr_ctr)(int group);
10111005
int rma_bpdu_fld_pmask;
10121006
int spcl_trap_eapol_ctrl;

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c‎

Lines changed: 25 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,21 @@
33
#include <asm/mach-rtl838x/mach-rtl83xx.h>
44
#include "rtl83xx.h"
55

6+
#define RTL839X_VLAN_PORT_TAG_STS_UNTAG 0x0
7+
#define RTL839X_VLAN_PORT_TAG_STS_TAGGED 0x1
8+
#define RTL839X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
9+
10+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE 0x6828
11+
/* port 0-52 */
12+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL(port) \
13+
RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
14+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(7,6)
15+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(5,4)
16+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
17+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
18+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
19+
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
20+
621
extern struct mutex smi_lock;
722
extern struct rtl83xx_soc_info soc_info;
823

@@ -1755,6 +1770,15 @@ int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
17551770
return 0;
17561771
}
17571772

1773+
void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
1774+
{
1775+
sw_w32(FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
1776+
keep_outer ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG) |
1777+
FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
1778+
keep_inner ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG),
1779+
RTL839X_VLAN_PORT_TAG_STS_CTRL(port));
1780+
}
1781+
17581782
void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
17591783
{
17601784
if (type == PBVLAN_TYPE_INNER)
@@ -1860,6 +1884,7 @@ const struct rtl838x_reg rtl839x_reg = {
18601884
.vlan_profile_dump = rtl839x_vlan_profile_dump,
18611885
.vlan_profile_setup = rtl839x_vlan_profile_setup,
18621886
.vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner,
1887+
.vlan_port_keep_tag_set = rtl839x_vlan_port_keep_tag_set,
18631888
.vlan_port_pvidmode_set = rtl839x_vlan_port_pvidmode_set,
18641889
.vlan_port_pvid_set = rtl839x_vlan_port_pvid_set,
18651890
.set_vlan_igr_filter = rtl839x_set_igr_filter,
@@ -1886,7 +1911,6 @@ const struct rtl838x_reg rtl839x_reg = {
18861911
.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
18871912
.read_cam = rtl839x_read_cam,
18881913
.write_cam = rtl839x_write_cam,
1889-
.vlan_port_tag_sts_ctrl = RTL839X_VLAN_PORT_TAG_STS_CTRL,
18901914
.trk_mbr_ctr = rtl839x_trk_mbr_ctr,
18911915
.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
18921916
.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl930x.c‎

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,22 @@
55

66
#include "rtl83xx.h"
77

8+
#define RTL930X_VLAN_PORT_TAG_STS_INTERNAL 0x0
9+
#define RTL930X_VLAN_PORT_TAG_STS_UNTAG 0x1
10+
#define RTL930X_VLAN_PORT_TAG_STS_TAGGED 0x2
11+
#define RTL930X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
12+
13+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE 0xCE24
14+
/* port 0-28 */
15+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL(port) \
16+
RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
17+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK GENMASK(7,6)
18+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK GENMASK(5,4)
19+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
20+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
21+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
22+
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
23+
824
extern struct mutex smi_lock;
925
extern struct rtl83xx_soc_info soc_info;
1026

@@ -2300,6 +2316,15 @@ static void rtl930x_packet_cntr_clear(int counter)
23002316
rtl_table_release(r);
23012317
}
23022318

2319+
void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
2320+
{
2321+
sw_w32(FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK,
2322+
keep_outer ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG) |
2323+
FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK,
2324+
keep_inner ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG),
2325+
RTL930X_VLAN_PORT_TAG_STS_CTRL(port));
2326+
}
2327+
23032328
void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
23042329
{
23052330
if (type == PBVLAN_TYPE_INNER)
@@ -2498,7 +2523,7 @@ const struct rtl838x_reg rtl930x_reg = {
24982523
.write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash,
24992524
.read_cam = rtl930x_read_cam,
25002525
.write_cam = rtl930x_write_cam,
2501-
.vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL,
2526+
.vlan_port_keep_tag_set = rtl930x_vlan_port_keep_tag_set,
25022527
.vlan_port_pvidmode_set = rtl930x_vlan_port_pvidmode_set,
25032528
.vlan_port_pvid_set = rtl930x_vlan_port_pvid_set,
25042529
.trk_mbr_ctr = rtl930x_trk_mbr_ctr,

‎target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl931x.c‎

Lines changed: 30 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,26 @@
33
#include <asm/mach-rtl838x/mach-rtl83xx.h>
44
#include "rtl83xx.h"
55

6+
#define RTL931X_VLAN_PORT_TAG_STS_INTERNAL 0x0
7+
#define RTL931X_VLAN_PORT_TAG_STS_UNTAG 0x1
8+
#define RTL931X_VLAN_PORT_TAG_STS_TAGGED 0x2
9+
#define RTL931X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
10+
11+
#define RTL931X_VLAN_PORT_TAG_CTRL_BASE 0x4860
12+
/* port 0-56 */
13+
#define RTL931X_VLAN_PORT_TAG_CTRL(port) \
14+
RTL931X_VLAN_PORT_TAG_CTRL_BASE + (port << 2)
15+
#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK GENMASK(13,12)
16+
#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK GENMASK(11,10)
17+
#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK GENMASK(9,9)
18+
#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK GENMASK(8,8)
19+
#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK GENMASK(7,7)
20+
#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK GENMASK(6,6)
21+
#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK GENMASK(5,4)
22+
#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK GENMASK(3,3)
23+
#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK GENMASK(2,1)
24+
#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK GENMASK(0,0)
25+
626
extern struct mutex smi_lock;
727
extern struct rtl83xx_soc_info soc_info;
828

@@ -1470,6 +1490,15 @@ int rtl931x_l3_setup(struct rtl838x_switch_priv *priv)
14701490
return 0;
14711491
}
14721492

1493+
void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
1494+
{
1495+
sw_w32(FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK,
1496+
keep_outer ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG) |
1497+
FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK,
1498+
keep_inner ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG),
1499+
RTL931X_VLAN_PORT_TAG_CTRL(port));
1500+
}
1501+
14731502
void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
14741503
{
14751504
if (type == PBVLAN_TYPE_INNER)
@@ -1651,7 +1680,7 @@ const struct rtl838x_reg rtl931x_reg = {
16511680
.write_l2_entry_using_hash = rtl931x_write_l2_entry_using_hash,
16521681
.read_cam = rtl931x_read_cam,
16531682
.write_cam = rtl931x_write_cam,
1654-
.vlan_port_tag_sts_ctrl = RTL931X_VLAN_PORT_TAG_CTRL,
1683+
.vlan_port_keep_tag_set = rtl931x_vlan_port_keep_tag_set,
16551684
.vlan_port_pvidmode_set = rtl931x_vlan_port_pvidmode_set,
16561685
.vlan_port_pvid_set = rtl931x_vlan_port_pvid_set,
16571686
.trk_mbr_ctr = rtl931x_trk_mbr_ctr,

‎target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -348,11 +348,11 @@ inline u32 rtl839x_get_mac_link_spd_sts(int port)
348348

349349
inline u32 rtl930x_get_mac_link_spd_sts(int port)
350350
{
351-
int r = RTL930X_MAC_LINK_SPD_STS + ((port / 10) << 2);
351+
int r = RTL930X_MAC_LINK_SPD_STS + ((port >> 3) << 2);
352352
u32 speed = sw_r32(r);
353353

354-
speed >>= (port % 10) * 3;
355-
return (speed & 0x7);
354+
speed >>= (port % 8) << 2;
355+
return (speed & 0xf);
356356
}
357357

358358
inline u32 rtl931x_get_mac_link_spd_sts(int port)

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