Skip to content

Commit 418fd2e

Browse files
authored
update sys, add toggle for PPU reset behavior (#424)
1 parent 5ee4bd0 commit 418fd2e

File tree

7 files changed

+169
-70
lines changed

7 files changed

+169
-70
lines changed

NES.sv

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -271,6 +271,7 @@ parameter CONF_STR = {
271271
"P3o9,Pause when OSD is open,Off,On;",
272272
"P4,Advanced;",
273273
"P4-;",
274+
"P4O[64],PPU Reset Behavior,Famicom,NES;",
274275
"P4OQ,Video Dijitter,Enabled,Disabled;",
275276
"- ;",
276277
"R0,Reset;",
@@ -303,7 +304,7 @@ wire [23:0] joyA_unmod;
303304
wire [10:0] ps2_key;
304305
wire [1:0] buttons;
305306

306-
wire [63:0] status;
307+
wire [127:0] status;
307308

308309
wire arm_reset = status[0];
309310
wire pal_video = |status[24:23];
@@ -844,6 +845,7 @@ end
844845
NES nes (
845846
.clk (clk),
846847
.reset_nes (reset_nes),
848+
.ppu_rst_behavior(status[64]),
847849
.cold_reset (downloading & (type_fds | type_nes)),
848850
.pausecore (pausecore),
849851
.corepaused (corepaused),

rtl/apu.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -356,7 +356,7 @@ module TriangleChan (
356356
endcase
357357
end
358358

359-
if (reset) begin
359+
if (cold_reset) begin
360360
sample_latch <= 4'hF;
361361
Period <= 0;
362362
TimerCtr <= 0;

rtl/nes.v

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,7 @@ endmodule
7474
module NES(
7575
input clk,
7676
input reset_nes,
77+
input ppu_rst_behavior,
7778
input cold_reset,
7879
input pausecore,
7980
output corepaused,
@@ -575,6 +576,7 @@ assign scanline = (corepause_active) ? scanline_paused : scanline_ppu;
575576

576577
PPU ppu(
577578
.clk (clk),
579+
.rst_behavior (ppu_rst_behavior),
578580
.ce (ppu_ce),
579581
.reset (reset),
580582
.sys_type (sys_type),

rtl/ppu.sv

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1073,6 +1073,7 @@ endmodule // PaletteRam
10731073

10741074
module PPU(
10751075
input clk,
1076+
input rst_behavior,
10761077
input ce,
10771078
input reset, // input clock 21.48 MHz / 4. 1 clock cycle = 1 pixel
10781079
input cold_reset, // power cycle
@@ -1149,7 +1150,7 @@ initial begin
11491150
enable_playfield = 0;
11501151
enable_objects = 0;
11511152
emphasis = 0;
1152-
clear = 1;
1153+
clear = 0;
11531154
end
11541155

11551156
reg nmi_occured; // True if NMI has occured but not cleared.
@@ -1626,7 +1627,7 @@ always @(posedge clk) begin
16261627

16271628
if (reset) begin
16281629
latched_dout <= 8'd0;
1629-
clear <= 1;
1630+
clear <= rst_behavior;
16301631
end
16311632

16321633
if (SaveStateBus_load) begin

0 commit comments

Comments
 (0)