1414#include " LoopVectorizationPlanner.h"
1515#include " VPlan.h"
1616#include " VPlanCFG.h"
17+ #include " VPlanDominatorTree.h"
1718#include " VPlanTransforms.h"
1819#include " llvm/Analysis/LoopInfo.h"
1920#include " llvm/Analysis/ScalarEvolution.h"
2021
2122using namespace llvm ;
2223
23- void VPlanTransforms::introduceTopLevelVectorLoopRegion (
24- VPlan &Plan, Type *InductionTy, PredicatedScalarEvolution &PSE,
25- bool RequiresScalarEpilogueCheck, bool TailFolded, Loop *TheLoop) {
26- // TODO: Generalize to introduce all loop regions.
27- auto *HeaderVPBB = cast<VPBasicBlock>(Plan.getEntry ()->getSingleSuccessor ());
28- VPBlockUtils::disconnectBlocks (Plan.getEntry (), HeaderVPBB);
24+ // / Checks if \p HeaderVPB is a loop header block in the plain CFG; that is, it
25+ // / has exactly 2 predecessors (preheader and latch), where the block
26+ // / dominates the latch and the preheader dominates the block. If it is a
27+ // / header block return true, making sure the preheader appears first and
28+ // / the latch second. Otherwise return false.
29+ static bool canonicalHeader (VPBlockBase *HeaderVPB,
30+ const VPDominatorTree &VPDT) {
31+ ArrayRef<VPBlockBase *> Preds = HeaderVPB->getPredecessors ();
32+ if (Preds.size () != 2 )
33+ return false ;
2934
30- VPBasicBlock *OriginalLatch =
31- cast<VPBasicBlock>(HeaderVPBB->getSinglePredecessor ());
32- VPBlockUtils::disconnectBlocks (OriginalLatch, HeaderVPBB);
33- VPBasicBlock *VecPreheader = Plan.createVPBasicBlock (" vector.ph" );
34- VPBlockUtils::connectBlocks (Plan.getEntry (), VecPreheader);
35- assert (OriginalLatch->getNumSuccessors () == 0 &&
36- " Plan should end at top level latch" );
35+ auto *PreheaderVPBB = Preds[0 ];
36+ auto *LatchVPBB = Preds[1 ];
37+ if (VPDT.dominates (PreheaderVPBB, HeaderVPB) &&
38+ VPDT.dominates (HeaderVPB, LatchVPBB))
39+ return true ;
40+
41+ std::swap (PreheaderVPBB, LatchVPBB);
42+
43+ if (VPDT.dominates (PreheaderVPBB, HeaderVPB) &&
44+ VPDT.dominates (HeaderVPB, LatchVPBB)) {
45+ // Canonicalize predecessors of header so that preheader is first and latch
46+ // second.
47+ HeaderVPB->swapPredecessors ();
48+ for (VPRecipeBase &R : cast<VPBasicBlock>(HeaderVPB)->phis ())
49+ R.swapOperands ();
50+ return true ;
51+ }
52+
53+ return false ;
54+ }
55+
56+ // / Create a new VPRegionBlock for the loop starting at \p HeaderVPB.
57+ static void createLoopRegion (VPlan &Plan, VPBlockBase *HeaderVPB) {
58+ auto *PreheaderVPBB = HeaderVPB->getPredecessors ()[0 ];
59+ auto *LatchVPBB = HeaderVPB->getPredecessors ()[1 ];
60+
61+ VPBlockUtils::disconnectBlocks (PreheaderVPBB, HeaderVPB);
62+ VPBlockUtils::disconnectBlocks (LatchVPBB, HeaderVPB);
63+ VPBlockBase *Succ = LatchVPBB->getSingleSuccessor ();
64+ assert (LatchVPBB->getNumSuccessors () <= 1 &&
65+ " Latch has more than one successor" );
66+ if (Succ)
67+ VPBlockUtils::disconnectBlocks (LatchVPBB, Succ);
68+
69+ auto *R = Plan.createVPRegionBlock (HeaderVPB, LatchVPBB, " " ,
70+ false /* isReplicator*/ );
71+ R->setParent (HeaderVPB->getParent ());
72+ // All VPBB's reachable shallowly from HeaderVPB belong to top level loop,
73+ // because VPlan is expected to end at top level latch disconnected above.
74+ for (VPBlockBase *VPBB : vp_depth_first_shallow (HeaderVPB))
75+ VPBB->setParent (R);
76+
77+ VPBlockUtils::insertBlockAfter (R, PreheaderVPBB);
78+ if (Succ)
79+ VPBlockUtils::connectBlocks (R, Succ);
80+ }
81+
82+ void VPlanTransforms::createLoopRegions (VPlan &Plan, Type *InductionTy,
83+ PredicatedScalarEvolution &PSE,
84+ bool RequiresScalarEpilogueCheck,
85+ bool TailFolded, Loop *TheLoop) {
86+ VPDominatorTree VPDT;
87+ VPDT.recalculate (Plan);
88+ for (VPBlockBase *HeaderVPB : vp_depth_first_shallow (Plan.getEntry ()))
89+ if (canonicalHeader (HeaderVPB, VPDT))
90+ createLoopRegion (Plan, HeaderVPB);
91+
92+ VPRegionBlock *TopRegion = Plan.getVectorLoopRegion ();
93+ auto *OrigExiting = TopRegion->getExiting ();
94+ VPBasicBlock *LatchVPBB = Plan.createVPBasicBlock (" vector.latch" );
95+ VPBlockUtils::insertBlockAfter (LatchVPBB, OrigExiting);
96+ TopRegion->setExiting (LatchVPBB);
97+ TopRegion->setName (" vector loop" );
98+ TopRegion->getEntryBasicBlock ()->setName (" vector.body" );
3799
38100 // Create SCEV and VPValue for the trip count.
39101 // We use the symbolic max backedge-taken-count, which works also when
@@ -47,18 +109,9 @@ void VPlanTransforms::introduceTopLevelVectorLoopRegion(
47109 Plan.setTripCount (
48110 vputils::getOrCreateVPValueForSCEVExpr (Plan, TripCount, SE));
49111
50- // Create VPRegionBlock, with existing header and new empty latch block, to be
51- // filled.
52- VPBasicBlock *LatchVPBB = Plan.createVPBasicBlock (" vector.latch" );
53- VPBlockUtils::insertBlockAfter (LatchVPBB, OriginalLatch);
54- auto *TopRegion = Plan.createVPRegionBlock (
55- HeaderVPBB, LatchVPBB, " vector loop" , false /* isReplicator*/ );
56- // All VPBB's reachable shallowly from HeaderVPBB belong to top level loop,
57- // because VPlan is expected to end at top level latch.
58- for (VPBlockBase *VPBB : vp_depth_first_shallow (HeaderVPBB))
59- VPBB->setParent (TopRegion);
60-
61- VPBlockUtils::insertBlockAfter (TopRegion, VecPreheader);
112+ VPBasicBlock *VecPreheader = Plan.createVPBasicBlock (" vector.ph" );
113+ VPBlockUtils::insertBlockAfter (VecPreheader, Plan.getEntry ());
114+
62115 VPBasicBlock *MiddleVPBB = Plan.createVPBasicBlock (" middle.block" );
63116 VPBlockUtils::insertBlockAfter (MiddleVPBB, TopRegion);
64117
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