1 parent 06cd477 commit 27412d2Copy full SHA for 27412d2
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cpu/time.v
@@ -43,7 +43,7 @@ module tinyQV_time (
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/* verilator lint_on PINMISSING */
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wire [31:4] reg_buf;
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- tinyqv_buffer i_regbuf[31:4] ( .X(reg_buf), .A({register[3:0], register[31:8]}) );
+ tinyqv_buffer i_regbuf[31:4] ( .X(reg_buf), .A({mtimecmp[3:0], mtimecmp[31:8]}) );
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always @(posedge clk) mtimecmp[31:4] <= reg_buf;
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always @(posedge clk) begin
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