You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Copy file name to clipboardExpand all lines: docs/build/arm64-windows-abi-conventions.md
+5-2Lines changed: 5 additions & 2 deletions
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -21,6 +21,7 @@ Windows also uses these terms:
21
21
-**ARM** – refers to the 32-bit ARM architecture (AArch32), sometimes referred to as WoA (Windows on ARM).
22
22
-**ARM32** – same as **ARM**; used in this document for clarity.
23
23
-**ARM64** – refers to the 64-bit ARM architecture (AArch64). There's no such thing as WoA64.
24
+
-**ARM64EC** - code built as ARM64EC is interoperable with x64 code running under emulation in the same process. The Arm64EC code in the process runs with native performance, while any x64 code runs using emulation.
24
25
25
26
Finally, when referring to data types, the following definitions from ARM are referenced:
26
27
@@ -30,7 +31,7 @@ Finally, when referring to data types, the following definitions from ARM are re
30
31
31
32
## Base requirements
32
33
33
-
The ARM64 version of Windows presupposes that it's running on an ARMv8 or later architecture always. Both floating-point and NEON support are presumed to be present in hardware.
34
+
The ARM64 version of Windows always presupposes that it's running on an ARMv8 or later architecture. Both floating-point and NEON support are presumed to be present in hardware.
34
35
35
36
The ARMv8 specification describes new optional crypto and CRC helper opcodes for both AArch32 and AArch64. Support for them is currently optional, but recommended. To take advantage of these opcodes, apps should first make runtime checks for their existence.
36
37
@@ -122,7 +123,9 @@ You can determine if an ARM CPU supports exceptions by writing a value that enab
122
123
123
124
For ARM CPUs that support IEEE floating-point exceptions, the behavior on Windows is as follows:
124
125
125
-
-**Windows ARM64 ABI**: For processor variants that support hardware floating-point exceptions, Windows delivers them.
126
+
-**Arm32**: Windows doesn't support floating-point exceptions.
127
+
-**ARM64**: For processor variants that support hardware floating-point exceptions, Windows delivers them.
128
+
-**Arm64EC**: For processor variants that support hardware floating-point exceptions, Windows catches these exceptions and disables them in the FPCR register. This ensures consistent behavior across different processor variants.
126
129
127
130
- The [`_set_controlfp`](/cpp/c-runtime-library/reference/controlfp-s) function on ARM platforms correctly changes the FPCR register when unmasking floating-point exceptions. However, instead of raising an unmasked exception, Windows resets the FPCR register to its defaults every time an FP exception is about to be raised.
0 commit comments