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@@ -57,7 +57,7 @@ The processor extensions have the following characteristics:
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-**`AVX10.1`** adds more instructions on top of **`AVX-512`**. The default vector length for **`AVX10.1`** is 256 bits and can be changed to 512 bits using the [`/vlen`](vlen.md) flag. This option was introduced in Visual Studio 2022 17.13.
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-**`AVX10.2`** expands the instruction set introduced in `AVX10.1`. The default vector length for **`AVX10.2`** is 256 bits and can be increased to 512 bits using the [`/vlen`](vlen.md) flag.
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`AVX10.2` adds instructions that are enhancements of legacy instructions and media acceleration instructions. For more information about the new instructions, see section 3.1.4 in the [Intel Advanced Vector Extensions 10.2 Architecture Specification](https://www.intel.com/content/www/us/en/content-details/856721/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html) The AI related instructions in that document are supported via MSVC intrinsics instead of being directly emitted because their data types aren’t supported by MSVC. This compiler option was introduced in Visual Studio 2026.
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`AVX10.2` adds instructions that are enhancements of legacy instructions and media acceleration instructions. For more information about the new instructions, see section 3.1.4 in the [Intel Advanced Vector Extensions 10.2 Architecture Specification](https://www.intel.com/content/www/us/en/content-details/856721/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html). The AI related instructions in that document are supported via MSVC intrinsics instead of being directly emitted because their data types aren’t supported by MSVC. This compiler option was introduced in Visual Studio 2026.
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Each **`/arch`** option may also enable the use of other non-vector instructions that are associated with that option. An example is the use of certain BMI instructions when **`/arch:AVX2`** is specified.
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