Compilation errors for `RISCVEncoding`, `Zc`, and `RVD`

[7FM]

We are trying to use https://github.com/Minres/CoreDSL (version 2.0.12) to parse Zc.core_desc and observe the following errors and warnings:

ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 35 in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 44 in declaration of res in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 45 in instruction RVF.FLW: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 45 in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 54 in instruction RVF.FSW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 62 in instruction RVF.FMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 73 in instruction RVF.FMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 94 in instruction RVF.FMSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 118 in instruction RVF.FNMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 142 in instruction RVF.FNMSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 165 in instruction RVF.FADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 188 in instruction RVF.FSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 211 in instruction RVF.FMUL__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 234 in instruction RVF.FDIV__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 256 in instruction RVF.FSQRT__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 277 in instruction RVF.FSGNJ__S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 277 in instruction RVF.FSGNJ__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 296 in instruction RVF.FSGNJN__S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 296 in instruction RVF.FSGNJN__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 315 in instruction RVF.FSGNJX__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 336 in instruction RVF.FMIN__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 359 in instruction RVF.FMAX__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 516 in instruction RVF.FCVT__S__W: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 533 in instruction RVF.FCVT__S__WU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 591 in instruction RVF.FCVT_S_L: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 604 in instruction RVF.FCVT_S_LU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 338 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 342 column : 51)
ERROR:Cannot implicitly convert signed<32> to unsigned<32> (Zc.core_desc line : 342 column : 31)
WARNING:Identity cast does nothing (Zc.core_desc line : 352 column : 37)
WARNING:Identity cast does nothing (Zc.core_desc line : 361 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 365 column : 47)
ERROR:Cannot implicitly convert signed<32> to unsigned<32> (Zc.core_desc line : 365 column : 27)
WARNING:Identity cast does nothing (Zc.core_desc line : 375 column : 37)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 36 in instruction RVD.FLD: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 36 in instruction RVD.FLD: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 46 in instruction RVD.FSD: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 46 in instruction RVD.FSD: Cannot implicitly convert unsigned<64> to unsigned<8> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 59 in instruction RVD.FMADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 59 in instruction RVD.FMADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 61 in declaration of flags in instruction RVD.FMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 75 in instruction RVD.FMSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 75 in instruction RVD.FMSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 77 in declaration of flags in instruction RVD.FMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 91 in instruction RVD.FNMADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 91 in instruction RVD.FNMADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 93 in declaration of flags in instruction RVD.FNMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 107 in instruction RVD.FNMSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 107 in instruction RVD.FNMSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 109 in declaration of flags in instruction RVD.FNMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 123 in instruction RVD.FADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 123 in instruction RVD.FADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 125 in declaration of flags in instruction RVD.FADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 139 in instruction RVD.FSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 139 in instruction RVD.FSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 141 in declaration of flags in instruction RVD.FSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 155 in instruction RVD.FMUL_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 155 in instruction RVD.FMUL_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 157 in declaration of flags in instruction RVD.FMUL_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 171 in instruction RVD.FDIV_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 171 in instruction RVD.FDIV_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 173 in declaration of flags in instruction RVD.FDIV_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 183 in declaration of res in instruction RVD.FSQRT_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 183 in declaration of res in instruction RVD.FSQRT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 187 in instruction RVD.FSQRT_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 187 in instruction RVD.FSQRT_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 189 in declaration of flags in instruction RVD.FSQRT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 202 in instruction RVD.FSGNJ_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 202 in instruction RVD.FSGNJ_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 215 in instruction RVD.FSGNJN_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 215 in instruction RVD.FSGNJN_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 228 in instruction RVD.FSGNJX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 228 in instruction RVD.FSGNJX_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 238 in declaration of res in instruction RVD.FMIN_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 238 in declaration of res in instruction RVD.FMIN_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 242 in instruction RVD.FMIN_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 242 in instruction RVD.FMIN_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 244 in declaration of flags in instruction RVD.FMIN_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 254 in declaration of res in instruction RVD.FMAX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 254 in declaration of res in instruction RVD.FMAX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 258 in instruction RVD.FMAX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 258 in instruction RVD.FMAX_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 260 in declaration of flags in instruction RVD.FMAX_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 271 in instruction RVD.FCVT_S_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 271 in instruction RVD.FCVT_S_D: Cannot implicitly convert signed<34> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 279 in declaration of res in instruction RVD.FCVT_D_S: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 279 in declaration of res in instruction RVD.FCVT_D_S: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 283 in instruction RVD.FCVT_D_S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 283 in instruction RVD.FCVT_D_S: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 301 in declaration of flags in instruction RVD.FEQ_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 319 in declaration of flags in instruction RVD.FLT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 337 in declaration of flags in instruction RVD.FLE_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 346 in instruction RVD.FCLASS_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 357 in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 360 in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 363 in declaration of flags in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 376 in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 379 in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 382 in declaration of flags in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 391 in declaration of res in instruction RVD.FCVT_D_W: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 393 in instruction RVD.FCVT_D_W: Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 395 in instruction RVD.FCVT_D_W: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 395 in instruction RVD.FCVT_D_W: Cannot implicitly convert signed<65> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 404 in declaration of res in instruction RVD.FCVT_D_WU: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 408 in instruction RVD.FCVT_D_WU: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 408 in instruction RVD.FCVT_D_WU: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 388 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 392 column : 37)
ERROR:Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 392 column : 31)
WARNING:Identity cast does nothing (Zc.core_desc line : 402 column : 37)
WARNING:Identity cast does nothing (Zc.core_desc line : 411 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 415 column : 33)
ERROR:Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 415 column : 27)
WARNING:Identity cast does nothing (Zc.core_desc line : 425 column : 37)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
INFO:Assignment is allowed despite type incompatibility, because the right hand side is a constant (Zc.core_desc line : 433 column : 27)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 530 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 532 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 536 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 540 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 544 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 548 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 552 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 556 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 560 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 564 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 568 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 572 column : 26)
ERROR:Cannot combine unsigned<3> and <indeterminate type> with the - operator (Zc.core_desc line : 576 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 589 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 591 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 595 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 599 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 603 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 607 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 611 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 615 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 619 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 623 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 627 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 631 column : 26)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 635 column : 26)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 650 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 652 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 656 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 660 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 664 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 668 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 672 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 676 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 680 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 684 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 688 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 692 column : 27)
ERROR:Cannot combine unsigned<32> and <indeterminate type> with the - operator (Zc.core_desc line : 696 column : 27)
ERROR:Cannot combine <indeterminate type> and <indeterminate type> with the - operator (Zc.core_desc line : 699 column : 23)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 710 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 712 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 716 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 720 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 724 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 728 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 732 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 736 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 740 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 744 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 748 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 752 column : 27)
ERROR:Cannot combine unsigned<4> and <indeterminate type> with the - operator (Zc.core_desc line : 756 column : 27)
ERROR:Cannot combine <indeterminate type> and <indeterminate type> with the - operator (Zc.core_desc line : 759 column : 23)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 873 column : 16)

Maybe it would make sense to add the CoreDSL description files of this repository as test cases to the frontend?

[eyck]

@7FM Which branch/commit are you using?

Actually the CoreDSL files of this repo may be checked using the latest version of the CoreDSL frontend. But this can only be done using core definitions since for the Zc.core_desc although syntactically correct- some constant definitions value (liek XLEN) are missing.

[7FM]

@7FM Which branch/commit are you using?

I am using the tag 2.0.12 / Minres/CoreDSL@613fe86

I talked with one of the developers of https://github.com/tum-ei-eda/seal5 and it seems that they use their own custom CoreDSL frontend, but I haven't checked their code yet. So maybe the files from https://github.com/tum-ei-eda/RISCV_ISA_CoreDSL were not compatible with the official frontend to begin with.

[eyck]

I wanted to know which version of the RISCV_ISA_CoreDSL you are using.
Afaik the TUM parser is more 'foregiving' than this one. But indeed there are errors in the core_desc files which have not yet been fixed. So implementing a strategy to ensure consistence of the RISC-V descriptions is one of the next tasks.
But still: you cannot check for validity of a single extension description as essential definitions are missing.

[7FM]

I wanted to know which version of the RISCV_ISA_CoreDSL you are using.

My bad. Also the latest commit on master 4325a34e789d4772a93a29a062467774a64f4c61.

But still: you cannot check for validity of a single extension description as essential definitions are missing.

One problem at a time :D IIRC it should yell at me about the missing parameters at some later point.

[eyck]

One problem at a time :D IIRC it should yell at me about the missing parameters at some later point.

This is what the error message Cannot combine unsigned<4> and <indeterminate type> with the - operator tries to tell you...

[7FM]

I see, thx.
Here is the updated error/warning list:

ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 5 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 202 in instruction RVI.SW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 351 in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 370 in instruction RVI.SD: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 412 in declaration of sh_val in instruction RVI.SLLIW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 423 in declaration of sh_val in instruction RVI.SRLIW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 465 in declaration of count in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 466 in declaration of sh_val in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 477 in declaration of count in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 478 in declaration of sh_val in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 489 in declaration of count in instruction RVI.SRAW: Identity cast does nothing (Zc.core_desc line : 5 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 42 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 141 column : 78)
WARNING:Identity cast does nothing (Zc.core_desc line : 311 column : 37)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 35 in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 44 in declaration of res in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 45 in instruction RVF.FLW: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 45 in instruction RVF.FLW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 54 in instruction RVF.FSW: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 62 in instruction RVF.FMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 73 in instruction RVF.FMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 94 in instruction RVF.FMSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 118 in instruction RVF.FNMADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 142 in instruction RVF.FNMSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 165 in instruction RVF.FADD__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 188 in instruction RVF.FSUB__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 211 in instruction RVF.FMUL__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 234 in instruction RVF.FDIV__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 256 in instruction RVF.FSQRT__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 277 in instruction RVF.FSGNJ__S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 277 in instruction RVF.FSGNJ__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 296 in instruction RVF.FSGNJN__S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 296 in instruction RVF.FSGNJN__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 315 in instruction RVF.FSGNJX__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 336 in instruction RVF.FMIN__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 359 in instruction RVF.FMAX__S: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 507 in instruction RVF.FCVT__S__W: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 515 in declaration of res in instruction RVF.FCVT__S__W: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 516 in instruction RVF.FCVT__S__W: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 524 in instruction RVF.FCVT__S__WU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 532 in declaration of res in instruction RVF.FCVT__S__WU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 533 in instruction RVF.FCVT__S__WU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 557 in instruction RVF.FMV__W__X: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RVF.core_desc' on line 566 in instruction RVF.FCVT_L_S: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 331 column : 16)
ERROR:Error in file 'RVF.core_desc' on line 577 in instruction RVF.FCVT_LU_S: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 591 in instruction RVF.FCVT_S_L: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Warning in file 'RVF.core_desc' on line 604 in instruction RVF.FCVT_S_LU: Identity cast does nothing (Zc.core_desc line : 331 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 338 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 342 column : 51)
ERROR:Cannot implicitly convert signed<32> to unsigned<32> (Zc.core_desc line : 342 column : 31)
WARNING:Identity cast does nothing (Zc.core_desc line : 352 column : 37)
WARNING:Identity cast does nothing (Zc.core_desc line : 361 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 365 column : 47)
ERROR:Cannot implicitly convert signed<32> to unsigned<32> (Zc.core_desc line : 365 column : 27)
WARNING:Identity cast does nothing (Zc.core_desc line : 375 column : 37)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 31 in declaration of offs in instruction RVD.FLD: Cannot implicitly convert signed<34> to unsigned<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 36 in instruction RVD.FLD: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 36 in instruction RVD.FLD: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 45 in declaration of offs in instruction RVD.FSD: Cannot implicitly convert signed<34> to unsigned<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 46 in instruction RVD.FSD: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 46 in instruction RVD.FSD: Cannot implicitly convert unsigned<64> to unsigned<8> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 55 in declaration of res in instruction RVD.FMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 59 in instruction RVD.FMADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 59 in instruction RVD.FMADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 61 in declaration of flags in instruction RVD.FMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 71 in declaration of res in instruction RVD.FMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 75 in instruction RVD.FMSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 75 in instruction RVD.FMSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 77 in declaration of flags in instruction RVD.FMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 87 in declaration of res in instruction RVD.FNMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 91 in instruction RVD.FNMADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 91 in instruction RVD.FNMADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 93 in declaration of flags in instruction RVD.FNMADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 103 in declaration of res in instruction RVD.FNMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 107 in instruction RVD.FNMSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 107 in instruction RVD.FNMSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 109 in declaration of flags in instruction RVD.FNMSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 119 in declaration of res in instruction RVD.FADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 123 in instruction RVD.FADD_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 123 in instruction RVD.FADD_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 125 in declaration of flags in instruction RVD.FADD_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 135 in declaration of res in instruction RVD.FSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 139 in instruction RVD.FSUB_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 139 in instruction RVD.FSUB_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 141 in declaration of flags in instruction RVD.FSUB_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 151 in declaration of res in instruction RVD.FMUL_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 155 in instruction RVD.FMUL_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 155 in instruction RVD.FMUL_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 157 in declaration of flags in instruction RVD.FMUL_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 167 in declaration of res in instruction RVD.FDIV_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 171 in instruction RVD.FDIV_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 171 in instruction RVD.FDIV_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 173 in declaration of flags in instruction RVD.FDIV_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 183 in declaration of res in instruction RVD.FSQRT_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 183 in declaration of res in instruction RVD.FSQRT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 187 in instruction RVD.FSQRT_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 187 in instruction RVD.FSQRT_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 189 in declaration of flags in instruction RVD.FSQRT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 202 in instruction RVD.FSGNJ_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 202 in instruction RVD.FSGNJ_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 215 in instruction RVD.FSGNJN_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 215 in instruction RVD.FSGNJN_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 224 in declaration of res in instruction RVD.FSGNJX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 228 in instruction RVD.FSGNJX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 228 in instruction RVD.FSGNJX_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 238 in declaration of res in instruction RVD.FMIN_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 238 in declaration of res in instruction RVD.FMIN_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 242 in instruction RVD.FMIN_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 242 in instruction RVD.FMIN_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 244 in declaration of flags in instruction RVD.FMIN_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 254 in declaration of res in instruction RVD.FMAX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 254 in declaration of res in instruction RVD.FMAX_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 258 in instruction RVD.FMAX_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 258 in instruction RVD.FMAX_D: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 260 in declaration of flags in instruction RVD.FMAX_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 271 in instruction RVD.FCVT_S_D: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 271 in instruction RVD.FCVT_S_D: Cannot implicitly convert signed<34> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 279 in declaration of res in instruction RVD.FCVT_D_S: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 279 in declaration of res in instruction RVD.FCVT_D_S: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 283 in instruction RVD.FCVT_D_S: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 283 in instruction RVD.FCVT_D_S: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 300 in instruction RVD.FEQ_D: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 301 in declaration of flags in instruction RVD.FEQ_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 318 in instruction RVD.FLT_D: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 319 in declaration of flags in instruction RVD.FLT_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 336 in instruction RVD.FLE_D: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 337 in declaration of flags in instruction RVD.FLE_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 346 in instruction RVD.FCLASS_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 346 in instruction RVD.FCLASS_D: Cannot implicitly convert unsigned<64> to unsigned<32> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 357 in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 360 in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 363 in declaration of flags in instruction RVD.FCVT_W_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 376 in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 379 in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 381 in instruction RVD.FCVT_WU_D: Identity cast does nothing (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 382 in declaration of flags in instruction RVD.FCVT_WU_D: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 391 in declaration of res in instruction RVD.FCVT_D_W: Expected a function name (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 393 in instruction RVD.FCVT_D_W: Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 395 in instruction RVD.FCVT_D_W: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 395 in instruction RVD.FCVT_D_W: Cannot implicitly convert signed<65> to unsigned<64> (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 404 in declaration of res in instruction RVD.FCVT_D_WU: Expected a function name (Zc.core_desc line : 381 column : 16)
WARNING:Warning in file 'RVD.core_desc' on line 408 in instruction RVD.FCVT_D_WU: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 381 column : 16)
ERROR:Error in file 'RVD.core_desc' on line 408 in instruction RVD.FCVT_D_WU: Cannot implicitly convert signed<66> to unsigned<64> (Zc.core_desc line : 381 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 388 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 392 column : 37)
ERROR:Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 392 column : 31)
WARNING:Identity cast does nothing (Zc.core_desc line : 402 column : 37)
WARNING:Identity cast does nothing (Zc.core_desc line : 411 column : 37)
WARNING:Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 415 column : 33)
ERROR:Cannot implicitly convert signed<64> to unsigned<64> (Zc.core_desc line : 415 column : 27)
WARNING:Identity cast does nothing (Zc.core_desc line : 425 column : 37)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 431 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 202 in instruction RVI.SW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 351 in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 370 in instruction RVI.SD: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 412 in declaration of sh_val in instruction RVI.SLLIW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 423 in declaration of sh_val in instruction RVI.SRLIW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 465 in declaration of count in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 466 in declaration of sh_val in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 477 in declaration of count in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 478 in declaration of sh_val in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 489 in declaration of count in instruction RVI.SRAW: Identity cast does nothing (Zc.core_desc line : 431 column : 16)
INFO:Assignment is allowed despite type incompatibility, because the right hand side is a constant (Zc.core_desc line : 433 column : 27)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 520 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 202 in instruction RVI.SW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 351 in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 370 in instruction RVI.SD: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 412 in declaration of sh_val in instruction RVI.SLLIW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 423 in declaration of sh_val in instruction RVI.SRLIW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 465 in declaration of count in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 466 in declaration of sh_val in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 477 in declaration of count in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 478 in declaration of sh_val in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 489 in declaration of count in instruction RVI.SRAW: Identity cast does nothing (Zc.core_desc line : 520 column : 16)
WARNING:Identity cast does nothing (Zc.core_desc line : 651 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 653 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 657 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 661 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 665 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 669 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 673 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 677 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 681 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 685 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 689 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 693 column : 43)
WARNING:Identity cast does nothing (Zc.core_desc line : 697 column : 43)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 435 in declaration of RISCVEncoding.RV_MSTATUS32_SD: Cannot implicitly convert unsigned<32> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 436 in declaration of RISCVEncoding.RV_MSTATUS_UXL: Cannot implicitly convert unsigned<34> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 437 in declaration of RISCVEncoding.RV_MSTATUS_SXL: Cannot implicitly convert unsigned<36> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 438 in declaration of RISCVEncoding.RV_MSTATUS_SBE: Cannot implicitly convert unsigned<37> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 439 in declaration of RISCVEncoding.RV_MSTATUS_MBE: Cannot implicitly convert unsigned<38> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 440 in declaration of RISCVEncoding.RV_MSTATUS_GVA: Cannot implicitly convert unsigned<39> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 441 in declaration of RISCVEncoding.RV_MSTATUS_MPV: Cannot implicitly convert unsigned<40> to signed<32> (Zc.core_desc line : 873 column : 16)
ERROR:Error in file 'RISCVEncoding.core_desc' on line 442 in declaration of RISCVEncoding.RV_MSTATUS64_SD: Cannot implicitly convert unsigned<64> to signed<32> (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 466 in declaration of RISCVEncoding.RV_MIP_SSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 467 in declaration of RISCVEncoding.RV_MIP_VSSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 468 in declaration of RISCVEncoding.RV_MIP_MSIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 469 in declaration of RISCVEncoding.RV_MIP_UTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 470 in declaration of RISCVEncoding.RV_MIP_STIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 471 in declaration of RISCVEncoding.RV_MIP_VSTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 472 in declaration of RISCVEncoding.RV_MIP_MTIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 473 in declaration of RISCVEncoding.RV_MIP_UEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 474 in declaration of RISCVEncoding.RV_MIP_SEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 475 in declaration of RISCVEncoding.RV_MIP_VSEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 476 in declaration of RISCVEncoding.RV_MIP_MEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 477 in declaration of RISCVEncoding.RV_MIP_SGEIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RISCVEncoding.core_desc' on line 478 in declaration of RISCVEncoding.RV_MIP_LCOFIP: Shift expression always evaluates to zero; Please cast the left operand to a wider type before shifting (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 202 in instruction RVI.SW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 350 in declaration of res in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 351 in instruction RVI.LWU: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 370 in instruction RVI.SD: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 412 in declaration of sh_val in instruction RVI.SLLIW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 423 in declaration of sh_val in instruction RVI.SRLIW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 465 in declaration of count in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 466 in declaration of sh_val in instruction RVI.SLLW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 477 in declaration of count in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 478 in declaration of sh_val in instruction RVI.SRLW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)
WARNING:Warning in file 'RVI.core_desc' on line 489 in declaration of count in instruction RVI.SRAW: Identity cast does nothing (Zc.core_desc line : 873 column : 16)

Less errors in Zc :)