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lines changed Original file line number Diff line number Diff line change 5252 // reg[7:0] selected_impulse_counter;
5353 reg [2 :0 ] state;
5454 reg impulse_selected;
55+ reg period_done;
5556
5657 always @(posedge aclk)
5758 begin
7879 clk_counter <= 0 ;
7980 state <= LOWER_THRESHOLD_HIGH_PHASE;
8081 impulse_rejected <= 0 ;
82+ period_done <= 0 ;
8183 end
8284 LOWER_THRESHOLD_HIGH_PHASE:
8385 begin
121123 if (impulse_rejected == 0 )
122124 impulse_counter <= impulse_counter + 1 ;
123125 total_impulse_counter <= total_impulse_counter + 1 ;
124- if (total_impulse_counter == IMPULSES_PER_CHANNEL)
125- state <= FINAL_STATE ;
126- else state <= INITIAL_STATE ;
126+ if (total_impulse_counter < IMPULSES_PER_CHANNEL)
127+ state <= INITIAL_STATE ;
128+ else state <= FINAL_STATE ;
127129 end
128130 end
129131 FINAL_STATE:
130132 begin
131- state <= INITIAL_STATE;
133+ // state <= INITIAL_STATE;
132134 // impulse_selected <= 0;
133135 impulse_counter <= 0 ;
134136 total_impulse_counter <= 0 ;
137+ period_done <= 1 ;
135138 // impulse_selected <= 0;
136139 end
137140 default :
142145 else
143146 begin
144147 // impulse_selected <= 0;
145- total_impulse_counter <= 0 ;
148+ // total_impulse_counter <= 0;
146149 // impulse_selected <= 0;
150+ state <= INITIAL_STATE;
147151 end
148152 end
149153 end
150154
151- /* always @(posedge channel)
155+ always @(posedge channel)
152156 begin
153- if(~areset_n)
154- enable = 0;
155- else enable = ~enable;
156- end*/
157+ if (period_done)
158+ enable = ~ enable;
159+ end
157160
158161 endmodule
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