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Dmitry Sidorov
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[Backport to 18] Implement SPV_INTEL_float4 and SPV_INTEL_fp_conversions extensions (KhronosGroup#3419)
As well as their appropriate conversions via __builtin_spirv mechanism. Specification: intel/llvm#20467 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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-115
lines changed

17 files changed

+1139
-115
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‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,3 +84,5 @@ EXT(SPV_INTEL_shader_atomic_bfloat16)
8484
EXT(SPV_EXT_float8)
8585
EXT(SPV_INTEL_predicated_io)
8686
EXT(SPV_INTEL_sigmoid)
87+
EXT(SPV_INTEL_float4)
88+
EXT(SPV_INTEL_fp_conversions)

‎lib/SPIRV/SPIRVInternal.h‎

Lines changed: 112 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1032,6 +1032,7 @@ enum FPEncodingWrap {
10321032
BF16 = FPEncoding::FPEncodingBFloat16KHR,
10331033
E4M3 = FPEncoding::FPEncodingFloat8E4M3EXT,
10341034
E5M2 = FPEncoding::FPEncodingFloat8E5M2EXT,
1035+
E2M1 = internal::FPEncodingFloat4E2M1INTEL,
10351036
};
10361037

10371038
// Structure describing non-trivial conversions (FP8 and int4)
@@ -1060,36 +1061,117 @@ typedef SPIRVMap<llvm::StringRef, FPConversionDesc> FPConvertToEncodingMap;
10601061

10611062
// clang-format off
10621063
template <> inline void FPConvertToEncodingMap::init() {
1063-
// 8-bit conversions
1064-
add("ConvertE4M3ToFP16EXT",
1065-
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1066-
add("ConvertE5M2ToFP16EXT",
1067-
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1068-
add("ConvertE4M3ToBF16EXT",
1069-
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1070-
add("ConvertE5M2ToBF16EXT",
1071-
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1072-
add("ConvertFP16ToE4M3EXT",
1073-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1074-
add("ConvertFP16ToE5M2EXT",
1075-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1076-
add("ConvertBF16ToE4M3EXT",
1077-
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1078-
add("ConvertBF16ToE5M2EXT",
1079-
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1080-
1081-
add("ConvertInt4ToE4M3INTEL",
1082-
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1083-
add("ConvertInt4ToE5M2INTEL",
1084-
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1085-
add("ConvertInt4ToFP16INTEL",
1086-
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1087-
add("ConvertInt4ToBF16INTEL",
1088-
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1089-
add("ConvertFP16ToInt4INTEL",
1090-
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1091-
add("ConvertBF16ToInt4INTEL",
1092-
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1064+
// 4-bit conversions
1065+
add("ConvertE2M1ToE4M3INTEL",
1066+
{FPEncodingWrap::E2M1, FPEncodingWrap::E4M3, OpFConvert});
1067+
add("ConvertE2M1ToE5M2INTEL",
1068+
{FPEncodingWrap::E2M1, FPEncodingWrap::E5M2, OpFConvert});
1069+
add("ConvertE2M1ToFP16INTEL",
1070+
{FPEncodingWrap::E2M1, FPEncodingWrap::IEEE754, OpFConvert});
1071+
add("ConvertE2M1ToBF16INTEL",
1072+
{FPEncodingWrap::E2M1, FPEncodingWrap::BF16, OpFConvert});
1073+
1074+
add("ConvertInt4ToE4M3INTEL",
1075+
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1076+
add("ConvertInt4ToE5M2INTEL",
1077+
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1078+
add("ConvertInt4ToFP16INTEL",
1079+
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1080+
add("ConvertInt4ToBF16INTEL",
1081+
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1082+
add("ConvertInt4ToInt8INTEL",
1083+
{FPEncodingWrap::Integer, FPEncodingWrap::Integer, OpSConvert});
1084+
1085+
add("ConvertFP16ToE2M1INTEL",
1086+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1, OpFConvert});
1087+
add("ConvertBF16ToE2M1INTEL",
1088+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1, OpFConvert});
1089+
add("ConvertFP16ToInt4INTEL",
1090+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1091+
add("ConvertBF16ToInt4INTEL",
1092+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1093+
1094+
// 8-bit conversions
1095+
add("ConvertE4M3ToFP16EXT",
1096+
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1097+
add("ConvertE5M2ToFP16EXT",
1098+
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1099+
add("ConvertE4M3ToBF16EXT",
1100+
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1101+
add("ConvertE5M2ToBF16EXT",
1102+
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1103+
add("ConvertFP16ToE4M3EXT",
1104+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1105+
add("ConvertFP16ToE5M2EXT",
1106+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1107+
add("ConvertBF16ToE4M3EXT",
1108+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1109+
add("ConvertBF16ToE5M2EXT",
1110+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1111+
1112+
// SPV_INTEL_fp_conversions
1113+
add("ClampConvertFP16ToE2M1INTEL",
1114+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1115+
internal::OpClampConvertFToFINTEL});
1116+
add("ClampConvertBF16ToE2M1INTEL",
1117+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1118+
internal::OpClampConvertFToFINTEL});
1119+
add("ClampConvertFP16ToE4M3INTEL",
1120+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1121+
internal::OpClampConvertFToFINTEL});
1122+
add("ClampConvertBF16ToE4M3INTEL",
1123+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1124+
internal::OpClampConvertFToFINTEL});
1125+
add("ClampConvertFP16ToE5M2INTEL",
1126+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1127+
internal::OpClampConvertFToFINTEL});
1128+
add("ClampConvertBF16ToE5M2INTEL",
1129+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1130+
internal::OpClampConvertFToFINTEL});
1131+
add("ClampConvertFP16ToInt4INTEL",
1132+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1133+
internal::OpClampConvertFToSINTEL});
1134+
add("ClampConvertBF16ToInt4INTEL",
1135+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1136+
internal::OpClampConvertFToSINTEL});
1137+
1138+
add("StochasticRoundFP16ToE5M2INTEL",
1139+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1140+
internal::OpStochasticRoundFToFINTEL});
1141+
add("StochasticRoundFP16ToE4M3INTEL",
1142+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1143+
internal::OpStochasticRoundFToFINTEL});
1144+
add("StochasticRoundBF16ToE5M2INTEL",
1145+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1146+
internal::OpStochasticRoundFToFINTEL});
1147+
add("StochasticRoundBF16ToE4M3INTEL",
1148+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1149+
internal::OpStochasticRoundFToFINTEL});
1150+
add("StochasticRoundFP16ToE2M1INTEL",
1151+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1152+
internal::OpStochasticRoundFToFINTEL});
1153+
add("StochasticRoundBF16ToE2M1INTEL",
1154+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1155+
internal::OpStochasticRoundFToFINTEL});
1156+
add("ClampStochasticRoundFP16ToInt4INTEL",
1157+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1158+
internal::OpClampStochasticRoundFToSINTEL});
1159+
add("ClampStochasticRoundBF16ToInt4INTEL",
1160+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1161+
internal::OpClampStochasticRoundFToSINTEL});
1162+
1163+
add("ClampStochasticRoundFP16ToE5M2INTEL",
1164+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1165+
internal::OpClampStochasticRoundFToFINTEL});
1166+
add("ClampStochasticRoundFP16ToE4M3INTEL",
1167+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1168+
internal::OpClampStochasticRoundFToFINTEL});
1169+
add("ClampStochasticRoundBF16ToE5M2INTEL",
1170+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1171+
internal::OpClampStochasticRoundFToFINTEL});
1172+
add("ClampStochasticRoundBF16ToE4M3INTEL",
1173+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1174+
internal::OpClampStochasticRoundFToFINTEL});
10931175
}
10941176

10951177
// clang-format on

‎lib/SPIRV/SPIRVReader.cpp‎

Lines changed: 61 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -313,8 +313,11 @@ std::optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
313313

314314
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
315315
switch (T->getFloatBitWidth()) {
316+
case 4:
317+
// No LLVM IR counter part for FP4 - map it on i4.
318+
return Type::getIntNTy(*Context, 4);
316319
case 8:
317-
// No LLVM IR counter part for FP8 - map it on i8
320+
// No LLVM IR counter part for FP8 - map it on i8.
318321
return Type::getIntNTy(*Context, 8);
319322
case 16:
320323
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
@@ -1072,11 +1075,12 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10721075
return FPEncodingWrap::IEEE754;
10731076
};
10741077

1075-
auto IsFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1076-
return Encoding == FPEncodingWrap::E4M3 || Encoding == FPEncodingWrap::E5M2;
1078+
auto IsFP4OrFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1079+
return Encoding == FPEncodingWrap::E4M3 ||
1080+
Encoding == FPEncodingWrap::E5M2 || Encoding == FPEncodingWrap::E2M1;
10771081
};
10781082

1079-
switch (BC->getOpCode()) {
1083+
switch (static_cast<unsigned>(BC->getOpCode())) {
10801084
case OpPtrCastToGeneric:
10811085
case OpGenericCastToPtr:
10821086
case OpPtrCastToCrossWorkgroupINTEL:
@@ -1097,6 +1101,11 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10971101
case OpUConvert:
10981102
CO = IsExt ? Instruction::ZExt : Instruction::Trunc;
10991103
break;
1104+
case internal::OpClampConvertFToFINTEL:
1105+
case internal::OpClampConvertFToSINTEL:
1106+
case internal::OpStochasticRoundFToFINTEL:
1107+
case internal::OpClampStochasticRoundFToFINTEL:
1108+
case internal::OpClampStochasticRoundFToSINTEL:
11001109
case OpConvertSToF:
11011110
case OpConvertFToS:
11021111
case OpConvertUToF:
@@ -1121,7 +1130,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11211130

11221131
FPEncodingWrap SrcEnc = GetEncodingAndUpdateType(SPVSrcTy);
11231132
FPEncodingWrap DstEnc = GetEncodingAndUpdateType(SPVDstTy);
1124-
if (IsFP8Encoding(SrcEnc) || IsFP8Encoding(DstEnc) ||
1133+
if (IsFP4OrFP8Encoding(SrcEnc) || IsFP4OrFP8Encoding(DstEnc) ||
11251134
SPVSrcTy->isTypeInt(4) || SPVDstTy->isTypeInt(4)) {
11261135
FPConversionDesc FPDesc = {SrcEnc, DstEnc, BC->getOpCode()};
11271136
auto Conv = SPIRV::FPConvertToEncodingMap::rmap(FPDesc);
@@ -1131,13 +1140,47 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11311140
std::string BuiltinName =
11321141
kSPIRVName::InternalBuiltinPrefix + std::string(Conv);
11331142
BuiltinFuncMangleInfo Info;
1134-
std::string MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1143+
std::string MangledName;
1144+
// Translate additional Ops for stochastic conversions.
1145+
if (OC == internal::OpStochasticRoundFToFINTEL ||
1146+
OC == internal::OpClampStochasticRoundFToFINTEL ||
1147+
OC == internal::OpClampStochasticRoundFToSINTEL) {
1148+
// Seed.
1149+
Ops.emplace_back(transValue(SPVOps[1], F, BB, true));
1150+
OpsTys.emplace_back(Ops[1]->getType());
1151+
constexpr unsigned MaxOpsSize = 3;
1152+
if (SPVOps.size() == MaxOpsSize) {
1153+
// New Seed.
1154+
Ops.emplace_back(transValue(SPVOps[2], F, BB, true));
1155+
1156+
// The following mess is needed to create a function with correct
1157+
// mangling.
1158+
SPIRVType *PtrTy = SPVOps[2]->getType();
1159+
const unsigned AS =
1160+
SPIRSPIRVAddrSpaceMap::rmap(PtrTy->getPointerStorageClass());
1161+
Type *ElementTy = transType(PtrTy->getPointerElementType());
1162+
OpsTys.emplace_back(TypedPointerType::get(ElementTy, AS));
1163+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1164+
// But to create function itself we need untyped pointer type.
1165+
OpsTys[2] = opaquifyType(OpsTys[2]);
1166+
}
1167+
}
1168+
1169+
if (MangledName.empty())
1170+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
11351171

11361172
FunctionType *FTy = FunctionType::get(Dst, OpsTys, false);
11371173
FunctionCallee Func = M->getOrInsertFunction(MangledName, FTy);
11381174
return CallInst::Create(Func, Ops, "", BB);
11391175
}
11401176
}
1177+
// These conversions can be done without __builtin_spirv prefixed functions
1178+
// as their operand and result types have native representation in LLVM IR.
1179+
if (OC == internal::OpClampConvertFToFINTEL ||
1180+
OC == internal::OpStochasticRoundFToFINTEL ||
1181+
OC == internal::OpClampStochasticRoundFToFINTEL)
1182+
return mapValue(BV, transSPIRVBuiltinFromInst(
1183+
static_cast<SPIRVInstruction *>(BV), BB));
11411184

11421185
if (OC == OpFConvert) {
11431186
CO = IsExt ? Instruction::FPExt : Instruction::FPTrunc;
@@ -3047,7 +3090,11 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30473090
if (OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
30483091
OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
30493092
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
3050-
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT))
3093+
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
3094+
OutMatrixElementTy->isTypeFloat(
3095+
4, internal::FPEncodingFloat4E2M1INTEL) ||
3096+
InMatrixElementTy->isTypeFloat(4,
3097+
internal::FPEncodingFloat4E2M1INTEL))
30513098
Inst = transConvertInst(BV, F, BB);
30523099
else
30533100
Inst = transSPIRVBuiltinFromInst(BI, BB);
@@ -3056,6 +3103,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30563103
}
30573104
return mapValue(BV, Inst);
30583105
}
3106+
if (isIntelCvtOpCode(OC))
3107+
return mapValue(BV, transConvertInst(BV, F, BB));
30593108
return mapValue(
30603109
BV, transSPIRVBuiltinFromInst(static_cast<SPIRVInstruction *>(BV), BB));
30613110
}
@@ -3778,6 +3827,11 @@ Instruction *SPIRVToLLVM::transSPIRVBuiltinFromInst(SPIRVInstruction *BI,
37783827
case OpCooperativeMatrixLoadKHR:
37793828
case internal::OpCooperativeMatrixLoadCheckedINTEL:
37803829
case internal::OpConvertHandleToImageINTEL:
3830+
case internal::OpClampConvertFToFINTEL:
3831+
case internal::OpClampConvertFToSINTEL:
3832+
case internal::OpStochasticRoundFToFINTEL:
3833+
case internal::OpClampStochasticRoundFToFINTEL:
3834+
case internal::OpClampStochasticRoundFToSINTEL:
37813835
AddRetTypePostfix = true;
37823836
break;
37833837
default: {

‎lib/SPIRV/SPIRVToOCL.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -234,6 +234,10 @@ void SPIRVToOCLBase::visitCastInst(CastInst &Cast) {
234234
DstVecTy->getScalarSizeInBits() == 1)
235235
return;
236236

237+
// We don't have OpenCL builtins for 4-bit conversions.
238+
if (DstVecTy->getScalarSizeInBits() == 4 || SrcTy->getScalarSizeInBits() == 4)
239+
return;
240+
237241
// Assemble built-in name -> convert_gentypeN
238242
std::string CastBuiltInName(kOCLBuiltinName::ConvertPrefix);
239243
// Check if this is 'floating point -> unsigned integer' cast

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