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Dmitry Sidorov
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[Backport to 20] Implement SPV_INTEL_float4 and SPV_INTEL_fp_conversions extensions (KhronosGroup#3419)
As well as their appropriate conversions via __builtin_spirv mechanism. Specification: intel/llvm#20467 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,3 +86,5 @@ EXT(SPV_INTEL_shader_atomic_bfloat16)
8686
EXT(SPV_EXT_float8)
8787
EXT(SPV_INTEL_predicated_io)
8888
EXT(SPV_INTEL_sigmoid)
89+
EXT(SPV_INTEL_float4)
90+
EXT(SPV_INTEL_fp_conversions)

‎lib/SPIRV/SPIRVInternal.h‎

Lines changed: 112 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1049,6 +1049,7 @@ enum FPEncodingWrap {
10491049
BF16 = FPEncoding::FPEncodingBFloat16KHR,
10501050
E4M3 = FPEncoding::FPEncodingFloat8E4M3EXT,
10511051
E5M2 = FPEncoding::FPEncodingFloat8E5M2EXT,
1052+
E2M1 = internal::FPEncodingFloat4E2M1INTEL,
10521053
};
10531054

10541055
// Structure describing non-trivial conversions (FP8 and int4)
@@ -1077,36 +1078,117 @@ typedef SPIRVMap<llvm::StringRef, FPConversionDesc> FPConvertToEncodingMap;
10771078

10781079
// clang-format off
10791080
template <> inline void FPConvertToEncodingMap::init() {
1080-
// 8-bit conversions
1081-
add("ConvertE4M3ToFP16EXT",
1082-
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1083-
add("ConvertE5M2ToFP16EXT",
1084-
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1085-
add("ConvertE4M3ToBF16EXT",
1086-
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1087-
add("ConvertE5M2ToBF16EXT",
1088-
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1089-
add("ConvertFP16ToE4M3EXT",
1090-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1091-
add("ConvertFP16ToE5M2EXT",
1092-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1093-
add("ConvertBF16ToE4M3EXT",
1094-
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1095-
add("ConvertBF16ToE5M2EXT",
1096-
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1097-
1098-
add("ConvertInt4ToE4M3INTEL",
1099-
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1100-
add("ConvertInt4ToE5M2INTEL",
1101-
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1102-
add("ConvertInt4ToFP16INTEL",
1103-
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1104-
add("ConvertInt4ToBF16INTEL",
1105-
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1106-
add("ConvertFP16ToInt4INTEL",
1107-
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1108-
add("ConvertBF16ToInt4INTEL",
1109-
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1081+
// 4-bit conversions
1082+
add("ConvertE2M1ToE4M3INTEL",
1083+
{FPEncodingWrap::E2M1, FPEncodingWrap::E4M3, OpFConvert});
1084+
add("ConvertE2M1ToE5M2INTEL",
1085+
{FPEncodingWrap::E2M1, FPEncodingWrap::E5M2, OpFConvert});
1086+
add("ConvertE2M1ToFP16INTEL",
1087+
{FPEncodingWrap::E2M1, FPEncodingWrap::IEEE754, OpFConvert});
1088+
add("ConvertE2M1ToBF16INTEL",
1089+
{FPEncodingWrap::E2M1, FPEncodingWrap::BF16, OpFConvert});
1090+
1091+
add("ConvertInt4ToE4M3INTEL",
1092+
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1093+
add("ConvertInt4ToE5M2INTEL",
1094+
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1095+
add("ConvertInt4ToFP16INTEL",
1096+
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1097+
add("ConvertInt4ToBF16INTEL",
1098+
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1099+
add("ConvertInt4ToInt8INTEL",
1100+
{FPEncodingWrap::Integer, FPEncodingWrap::Integer, OpSConvert});
1101+
1102+
add("ConvertFP16ToE2M1INTEL",
1103+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1, OpFConvert});
1104+
add("ConvertBF16ToE2M1INTEL",
1105+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1, OpFConvert});
1106+
add("ConvertFP16ToInt4INTEL",
1107+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1108+
add("ConvertBF16ToInt4INTEL",
1109+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1110+
1111+
// 8-bit conversions
1112+
add("ConvertE4M3ToFP16EXT",
1113+
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1114+
add("ConvertE5M2ToFP16EXT",
1115+
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1116+
add("ConvertE4M3ToBF16EXT",
1117+
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1118+
add("ConvertE5M2ToBF16EXT",
1119+
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1120+
add("ConvertFP16ToE4M3EXT",
1121+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1122+
add("ConvertFP16ToE5M2EXT",
1123+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1124+
add("ConvertBF16ToE4M3EXT",
1125+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1126+
add("ConvertBF16ToE5M2EXT",
1127+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1128+
1129+
// SPV_INTEL_fp_conversions
1130+
add("ClampConvertFP16ToE2M1INTEL",
1131+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1132+
internal::OpClampConvertFToFINTEL});
1133+
add("ClampConvertBF16ToE2M1INTEL",
1134+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1135+
internal::OpClampConvertFToFINTEL});
1136+
add("ClampConvertFP16ToE4M3INTEL",
1137+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1138+
internal::OpClampConvertFToFINTEL});
1139+
add("ClampConvertBF16ToE4M3INTEL",
1140+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1141+
internal::OpClampConvertFToFINTEL});
1142+
add("ClampConvertFP16ToE5M2INTEL",
1143+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1144+
internal::OpClampConvertFToFINTEL});
1145+
add("ClampConvertBF16ToE5M2INTEL",
1146+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1147+
internal::OpClampConvertFToFINTEL});
1148+
add("ClampConvertFP16ToInt4INTEL",
1149+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1150+
internal::OpClampConvertFToSINTEL});
1151+
add("ClampConvertBF16ToInt4INTEL",
1152+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1153+
internal::OpClampConvertFToSINTEL});
1154+
1155+
add("StochasticRoundFP16ToE5M2INTEL",
1156+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1157+
internal::OpStochasticRoundFToFINTEL});
1158+
add("StochasticRoundFP16ToE4M3INTEL",
1159+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1160+
internal::OpStochasticRoundFToFINTEL});
1161+
add("StochasticRoundBF16ToE5M2INTEL",
1162+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1163+
internal::OpStochasticRoundFToFINTEL});
1164+
add("StochasticRoundBF16ToE4M3INTEL",
1165+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1166+
internal::OpStochasticRoundFToFINTEL});
1167+
add("StochasticRoundFP16ToE2M1INTEL",
1168+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1169+
internal::OpStochasticRoundFToFINTEL});
1170+
add("StochasticRoundBF16ToE2M1INTEL",
1171+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1172+
internal::OpStochasticRoundFToFINTEL});
1173+
add("ClampStochasticRoundFP16ToInt4INTEL",
1174+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1175+
internal::OpClampStochasticRoundFToSINTEL});
1176+
add("ClampStochasticRoundBF16ToInt4INTEL",
1177+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1178+
internal::OpClampStochasticRoundFToSINTEL});
1179+
1180+
add("ClampStochasticRoundFP16ToE5M2INTEL",
1181+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1182+
internal::OpClampStochasticRoundFToFINTEL});
1183+
add("ClampStochasticRoundFP16ToE4M3INTEL",
1184+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1185+
internal::OpClampStochasticRoundFToFINTEL});
1186+
add("ClampStochasticRoundBF16ToE5M2INTEL",
1187+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1188+
internal::OpClampStochasticRoundFToFINTEL});
1189+
add("ClampStochasticRoundBF16ToE4M3INTEL",
1190+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1191+
internal::OpClampStochasticRoundFToFINTEL});
11101192
}
11111193

11121194
// clang-format on

‎lib/SPIRV/SPIRVReader.cpp‎

Lines changed: 61 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -314,8 +314,11 @@ std::optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
314314

315315
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
316316
switch (T->getFloatBitWidth()) {
317+
case 4:
318+
// No LLVM IR counter part for FP4 - map it on i4.
319+
return Type::getIntNTy(*Context, 4);
317320
case 8:
318-
// No LLVM IR counter part for FP8 - map it on i8
321+
// No LLVM IR counter part for FP8 - map it on i8.
319322
return Type::getIntNTy(*Context, 8);
320323
case 16:
321324
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
@@ -1084,11 +1087,12 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10841087
return FPEncodingWrap::IEEE754;
10851088
};
10861089

1087-
auto IsFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1088-
return Encoding == FPEncodingWrap::E4M3 || Encoding == FPEncodingWrap::E5M2;
1090+
auto IsFP4OrFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1091+
return Encoding == FPEncodingWrap::E4M3 ||
1092+
Encoding == FPEncodingWrap::E5M2 || Encoding == FPEncodingWrap::E2M1;
10891093
};
10901094

1091-
switch (BC->getOpCode()) {
1095+
switch (static_cast<unsigned>(BC->getOpCode())) {
10921096
case OpPtrCastToGeneric:
10931097
case OpGenericCastToPtr:
10941098
case OpPtrCastToCrossWorkgroupINTEL:
@@ -1109,6 +1113,11 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11091113
case OpUConvert:
11101114
CO = IsExt ? Instruction::ZExt : Instruction::Trunc;
11111115
break;
1116+
case internal::OpClampConvertFToFINTEL:
1117+
case internal::OpClampConvertFToSINTEL:
1118+
case internal::OpStochasticRoundFToFINTEL:
1119+
case internal::OpClampStochasticRoundFToFINTEL:
1120+
case internal::OpClampStochasticRoundFToSINTEL:
11121121
case OpConvertSToF:
11131122
case OpConvertFToS:
11141123
case OpConvertUToF:
@@ -1133,7 +1142,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11331142

11341143
FPEncodingWrap SrcEnc = GetEncodingAndUpdateType(SPVSrcTy);
11351144
FPEncodingWrap DstEnc = GetEncodingAndUpdateType(SPVDstTy);
1136-
if (IsFP8Encoding(SrcEnc) || IsFP8Encoding(DstEnc) ||
1145+
if (IsFP4OrFP8Encoding(SrcEnc) || IsFP4OrFP8Encoding(DstEnc) ||
11371146
SPVSrcTy->isTypeInt(4) || SPVDstTy->isTypeInt(4)) {
11381147
FPConversionDesc FPDesc = {SrcEnc, DstEnc, BC->getOpCode()};
11391148
auto Conv = SPIRV::FPConvertToEncodingMap::rmap(FPDesc);
@@ -1143,13 +1152,47 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11431152
std::string BuiltinName =
11441153
kSPIRVName::InternalBuiltinPrefix + std::string(Conv);
11451154
BuiltinFuncMangleInfo Info;
1146-
std::string MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1155+
std::string MangledName;
1156+
// Translate additional Ops for stochastic conversions.
1157+
if (OC == internal::OpStochasticRoundFToFINTEL ||
1158+
OC == internal::OpClampStochasticRoundFToFINTEL ||
1159+
OC == internal::OpClampStochasticRoundFToSINTEL) {
1160+
// Seed.
1161+
Ops.emplace_back(transValue(SPVOps[1], F, BB, true));
1162+
OpsTys.emplace_back(Ops[1]->getType());
1163+
constexpr unsigned MaxOpsSize = 3;
1164+
if (SPVOps.size() == MaxOpsSize) {
1165+
// New Seed.
1166+
Ops.emplace_back(transValue(SPVOps[2], F, BB, true));
1167+
1168+
// The following mess is needed to create a function with correct
1169+
// mangling.
1170+
SPIRVType *PtrTy = SPVOps[2]->getType();
1171+
const unsigned AS =
1172+
SPIRSPIRVAddrSpaceMap::rmap(PtrTy->getPointerStorageClass());
1173+
Type *ElementTy = transType(PtrTy->getPointerElementType());
1174+
OpsTys.emplace_back(TypedPointerType::get(ElementTy, AS));
1175+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1176+
// But to create function itself we need untyped pointer type.
1177+
OpsTys[2] = opaquifyType(OpsTys[2]);
1178+
}
1179+
}
1180+
1181+
if (MangledName.empty())
1182+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
11471183

11481184
FunctionType *FTy = FunctionType::get(Dst, OpsTys, false);
11491185
FunctionCallee Func = M->getOrInsertFunction(MangledName, FTy);
11501186
return CallInst::Create(Func, Ops, "", BB);
11511187
}
11521188
}
1189+
// These conversions can be done without __builtin_spirv prefixed functions
1190+
// as their operand and result types have native representation in LLVM IR.
1191+
if (OC == internal::OpClampConvertFToFINTEL ||
1192+
OC == internal::OpStochasticRoundFToFINTEL ||
1193+
OC == internal::OpClampStochasticRoundFToFINTEL)
1194+
return mapValue(BV, transSPIRVBuiltinFromInst(
1195+
static_cast<SPIRVInstruction *>(BV), BB));
11531196

11541197
if (OC == OpFConvert) {
11551198
CO = IsExt ? Instruction::FPExt : Instruction::FPTrunc;
@@ -3074,7 +3117,11 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30743117
if (OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
30753118
OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
30763119
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
3077-
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT))
3120+
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
3121+
OutMatrixElementTy->isTypeFloat(
3122+
4, internal::FPEncodingFloat4E2M1INTEL) ||
3123+
InMatrixElementTy->isTypeFloat(4,
3124+
internal::FPEncodingFloat4E2M1INTEL))
30783125
Inst = transConvertInst(BV, F, BB);
30793126
else
30803127
Inst = transSPIRVBuiltinFromInst(BI, BB);
@@ -3083,6 +3130,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30833130
}
30843131
return mapValue(BV, Inst);
30853132
}
3133+
if (isIntelCvtOpCode(OC))
3134+
return mapValue(BV, transConvertInst(BV, F, BB));
30863135
return mapValue(
30873136
BV, transSPIRVBuiltinFromInst(static_cast<SPIRVInstruction *>(BV), BB));
30883137
}
@@ -3889,6 +3938,11 @@ Instruction *SPIRVToLLVM::transSPIRVBuiltinFromInst(SPIRVInstruction *BI,
38893938
case internal::OpTaskSequenceCreateINTEL:
38903939
case internal::OpConvertHandleToImageINTEL:
38913940
case internal::OpConvertHandleToSampledImageINTEL:
3941+
case internal::OpClampConvertFToFINTEL:
3942+
case internal::OpClampConvertFToSINTEL:
3943+
case internal::OpStochasticRoundFToFINTEL:
3944+
case internal::OpClampStochasticRoundFToFINTEL:
3945+
case internal::OpClampStochasticRoundFToSINTEL:
38923946
AddRetTypePostfix = true;
38933947
break;
38943948
default: {

‎lib/SPIRV/SPIRVToOCL.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -247,6 +247,10 @@ void SPIRVToOCLBase::visitCastInst(CastInst &Cast) {
247247
DstVecTy->getScalarSizeInBits() == 1)
248248
return;
249249

250+
// We don't have OpenCL builtins for 4-bit conversions.
251+
if (DstVecTy->getScalarSizeInBits() == 4 || SrcTy->getScalarSizeInBits() == 4)
252+
return;
253+
250254
// Assemble built-in name -> convert_gentypeN
251255
std::string CastBuiltInName(kOCLBuiltinName::ConvertPrefix);
252256
// Check if this is 'floating point -> unsigned integer' cast

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