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Dmitry Sidorov
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[Backport to 19] Implement SPV_INTEL_float4 and SPV_INTEL_fp_conversions extensions (KhronosGroup#3419)
As well as their appropriate conversions via __builtin_spirv mechanism. Specification: intel/llvm#20467 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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-116
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17 files changed

+1139
-116
lines changed

‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,3 +86,5 @@ EXT(SPV_INTEL_shader_atomic_bfloat16)
8686
EXT(SPV_EXT_float8)
8787
EXT(SPV_INTEL_predicated_io)
8888
EXT(SPV_INTEL_sigmoid)
89+
EXT(SPV_INTEL_float4)
90+
EXT(SPV_INTEL_fp_conversions)

‎lib/SPIRV/SPIRVInternal.h‎

Lines changed: 112 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1035,6 +1035,7 @@ enum FPEncodingWrap {
10351035
BF16 = FPEncoding::FPEncodingBFloat16KHR,
10361036
E4M3 = FPEncoding::FPEncodingFloat8E4M3EXT,
10371037
E5M2 = FPEncoding::FPEncodingFloat8E5M2EXT,
1038+
E2M1 = internal::FPEncodingFloat4E2M1INTEL,
10381039
};
10391040

10401041
// Structure describing non-trivial conversions (FP8 and int4)
@@ -1063,36 +1064,117 @@ typedef SPIRVMap<llvm::StringRef, FPConversionDesc> FPConvertToEncodingMap;
10631064

10641065
// clang-format off
10651066
template <> inline void FPConvertToEncodingMap::init() {
1066-
// 8-bit conversions
1067-
add("ConvertE4M3ToFP16EXT",
1068-
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1069-
add("ConvertE5M2ToFP16EXT",
1070-
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1071-
add("ConvertE4M3ToBF16EXT",
1072-
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1073-
add("ConvertE5M2ToBF16EXT",
1074-
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1075-
add("ConvertFP16ToE4M3EXT",
1076-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1077-
add("ConvertFP16ToE5M2EXT",
1078-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1079-
add("ConvertBF16ToE4M3EXT",
1080-
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1081-
add("ConvertBF16ToE5M2EXT",
1082-
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1083-
1084-
add("ConvertInt4ToE4M3INTEL",
1085-
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1086-
add("ConvertInt4ToE5M2INTEL",
1087-
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1088-
add("ConvertInt4ToFP16INTEL",
1089-
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1090-
add("ConvertInt4ToBF16INTEL",
1091-
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1092-
add("ConvertFP16ToInt4INTEL",
1093-
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1094-
add("ConvertBF16ToInt4INTEL",
1095-
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1067+
// 4-bit conversions
1068+
add("ConvertE2M1ToE4M3INTEL",
1069+
{FPEncodingWrap::E2M1, FPEncodingWrap::E4M3, OpFConvert});
1070+
add("ConvertE2M1ToE5M2INTEL",
1071+
{FPEncodingWrap::E2M1, FPEncodingWrap::E5M2, OpFConvert});
1072+
add("ConvertE2M1ToFP16INTEL",
1073+
{FPEncodingWrap::E2M1, FPEncodingWrap::IEEE754, OpFConvert});
1074+
add("ConvertE2M1ToBF16INTEL",
1075+
{FPEncodingWrap::E2M1, FPEncodingWrap::BF16, OpFConvert});
1076+
1077+
add("ConvertInt4ToE4M3INTEL",
1078+
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1079+
add("ConvertInt4ToE5M2INTEL",
1080+
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1081+
add("ConvertInt4ToFP16INTEL",
1082+
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1083+
add("ConvertInt4ToBF16INTEL",
1084+
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1085+
add("ConvertInt4ToInt8INTEL",
1086+
{FPEncodingWrap::Integer, FPEncodingWrap::Integer, OpSConvert});
1087+
1088+
add("ConvertFP16ToE2M1INTEL",
1089+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1, OpFConvert});
1090+
add("ConvertBF16ToE2M1INTEL",
1091+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1, OpFConvert});
1092+
add("ConvertFP16ToInt4INTEL",
1093+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1094+
add("ConvertBF16ToInt4INTEL",
1095+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1096+
1097+
// 8-bit conversions
1098+
add("ConvertE4M3ToFP16EXT",
1099+
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1100+
add("ConvertE5M2ToFP16EXT",
1101+
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1102+
add("ConvertE4M3ToBF16EXT",
1103+
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1104+
add("ConvertE5M2ToBF16EXT",
1105+
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1106+
add("ConvertFP16ToE4M3EXT",
1107+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1108+
add("ConvertFP16ToE5M2EXT",
1109+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1110+
add("ConvertBF16ToE4M3EXT",
1111+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1112+
add("ConvertBF16ToE5M2EXT",
1113+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1114+
1115+
// SPV_INTEL_fp_conversions
1116+
add("ClampConvertFP16ToE2M1INTEL",
1117+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1118+
internal::OpClampConvertFToFINTEL});
1119+
add("ClampConvertBF16ToE2M1INTEL",
1120+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1121+
internal::OpClampConvertFToFINTEL});
1122+
add("ClampConvertFP16ToE4M3INTEL",
1123+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1124+
internal::OpClampConvertFToFINTEL});
1125+
add("ClampConvertBF16ToE4M3INTEL",
1126+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1127+
internal::OpClampConvertFToFINTEL});
1128+
add("ClampConvertFP16ToE5M2INTEL",
1129+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1130+
internal::OpClampConvertFToFINTEL});
1131+
add("ClampConvertBF16ToE5M2INTEL",
1132+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1133+
internal::OpClampConvertFToFINTEL});
1134+
add("ClampConvertFP16ToInt4INTEL",
1135+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1136+
internal::OpClampConvertFToSINTEL});
1137+
add("ClampConvertBF16ToInt4INTEL",
1138+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1139+
internal::OpClampConvertFToSINTEL});
1140+
1141+
add("StochasticRoundFP16ToE5M2INTEL",
1142+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1143+
internal::OpStochasticRoundFToFINTEL});
1144+
add("StochasticRoundFP16ToE4M3INTEL",
1145+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1146+
internal::OpStochasticRoundFToFINTEL});
1147+
add("StochasticRoundBF16ToE5M2INTEL",
1148+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1149+
internal::OpStochasticRoundFToFINTEL});
1150+
add("StochasticRoundBF16ToE4M3INTEL",
1151+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1152+
internal::OpStochasticRoundFToFINTEL});
1153+
add("StochasticRoundFP16ToE2M1INTEL",
1154+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1155+
internal::OpStochasticRoundFToFINTEL});
1156+
add("StochasticRoundBF16ToE2M1INTEL",
1157+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1158+
internal::OpStochasticRoundFToFINTEL});
1159+
add("ClampStochasticRoundFP16ToInt4INTEL",
1160+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1161+
internal::OpClampStochasticRoundFToSINTEL});
1162+
add("ClampStochasticRoundBF16ToInt4INTEL",
1163+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1164+
internal::OpClampStochasticRoundFToSINTEL});
1165+
1166+
add("ClampStochasticRoundFP16ToE5M2INTEL",
1167+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1168+
internal::OpClampStochasticRoundFToFINTEL});
1169+
add("ClampStochasticRoundFP16ToE4M3INTEL",
1170+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1171+
internal::OpClampStochasticRoundFToFINTEL});
1172+
add("ClampStochasticRoundBF16ToE5M2INTEL",
1173+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1174+
internal::OpClampStochasticRoundFToFINTEL});
1175+
add("ClampStochasticRoundBF16ToE4M3INTEL",
1176+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1177+
internal::OpClampStochasticRoundFToFINTEL});
10961178
}
10971179

10981180
// clang-format on

‎lib/SPIRV/SPIRVReader.cpp‎

Lines changed: 61 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -315,8 +315,11 @@ std::optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
315315

316316
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
317317
switch (T->getFloatBitWidth()) {
318+
case 4:
319+
// No LLVM IR counter part for FP4 - map it on i4.
320+
return Type::getIntNTy(*Context, 4);
318321
case 8:
319-
// No LLVM IR counter part for FP8 - map it on i8
322+
// No LLVM IR counter part for FP8 - map it on i8.
320323
return Type::getIntNTy(*Context, 8);
321324
case 16:
322325
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
@@ -1077,11 +1080,12 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10771080
return FPEncodingWrap::IEEE754;
10781081
};
10791082

1080-
auto IsFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1081-
return Encoding == FPEncodingWrap::E4M3 || Encoding == FPEncodingWrap::E5M2;
1083+
auto IsFP4OrFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1084+
return Encoding == FPEncodingWrap::E4M3 ||
1085+
Encoding == FPEncodingWrap::E5M2 || Encoding == FPEncodingWrap::E2M1;
10821086
};
10831087

1084-
switch (BC->getOpCode()) {
1088+
switch (static_cast<unsigned>(BC->getOpCode())) {
10851089
case OpPtrCastToGeneric:
10861090
case OpGenericCastToPtr:
10871091
case OpPtrCastToCrossWorkgroupINTEL:
@@ -1102,6 +1106,11 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11021106
case OpUConvert:
11031107
CO = IsExt ? Instruction::ZExt : Instruction::Trunc;
11041108
break;
1109+
case internal::OpClampConvertFToFINTEL:
1110+
case internal::OpClampConvertFToSINTEL:
1111+
case internal::OpStochasticRoundFToFINTEL:
1112+
case internal::OpClampStochasticRoundFToFINTEL:
1113+
case internal::OpClampStochasticRoundFToSINTEL:
11051114
case OpConvertSToF:
11061115
case OpConvertFToS:
11071116
case OpConvertUToF:
@@ -1126,7 +1135,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11261135

11271136
FPEncodingWrap SrcEnc = GetEncodingAndUpdateType(SPVSrcTy);
11281137
FPEncodingWrap DstEnc = GetEncodingAndUpdateType(SPVDstTy);
1129-
if (IsFP8Encoding(SrcEnc) || IsFP8Encoding(DstEnc) ||
1138+
if (IsFP4OrFP8Encoding(SrcEnc) || IsFP4OrFP8Encoding(DstEnc) ||
11301139
SPVSrcTy->isTypeInt(4) || SPVDstTy->isTypeInt(4)) {
11311140
FPConversionDesc FPDesc = {SrcEnc, DstEnc, BC->getOpCode()};
11321141
auto Conv = SPIRV::FPConvertToEncodingMap::rmap(FPDesc);
@@ -1136,13 +1145,47 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11361145
std::string BuiltinName =
11371146
kSPIRVName::InternalBuiltinPrefix + std::string(Conv);
11381147
BuiltinFuncMangleInfo Info;
1139-
std::string MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1148+
std::string MangledName;
1149+
// Translate additional Ops for stochastic conversions.
1150+
if (OC == internal::OpStochasticRoundFToFINTEL ||
1151+
OC == internal::OpClampStochasticRoundFToFINTEL ||
1152+
OC == internal::OpClampStochasticRoundFToSINTEL) {
1153+
// Seed.
1154+
Ops.emplace_back(transValue(SPVOps[1], F, BB, true));
1155+
OpsTys.emplace_back(Ops[1]->getType());
1156+
constexpr unsigned MaxOpsSize = 3;
1157+
if (SPVOps.size() == MaxOpsSize) {
1158+
// New Seed.
1159+
Ops.emplace_back(transValue(SPVOps[2], F, BB, true));
1160+
1161+
// The following mess is needed to create a function with correct
1162+
// mangling.
1163+
SPIRVType *PtrTy = SPVOps[2]->getType();
1164+
const unsigned AS =
1165+
SPIRSPIRVAddrSpaceMap::rmap(PtrTy->getPointerStorageClass());
1166+
Type *ElementTy = transType(PtrTy->getPointerElementType());
1167+
OpsTys.emplace_back(TypedPointerType::get(ElementTy, AS));
1168+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1169+
// But to create function itself we need untyped pointer type.
1170+
OpsTys[2] = opaquifyType(OpsTys[2]);
1171+
}
1172+
}
1173+
1174+
if (MangledName.empty())
1175+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
11401176

11411177
FunctionType *FTy = FunctionType::get(Dst, OpsTys, false);
11421178
FunctionCallee Func = M->getOrInsertFunction(MangledName, FTy);
11431179
return CallInst::Create(Func, Ops, "", BB);
11441180
}
11451181
}
1182+
// These conversions can be done without __builtin_spirv prefixed functions
1183+
// as their operand and result types have native representation in LLVM IR.
1184+
if (OC == internal::OpClampConvertFToFINTEL ||
1185+
OC == internal::OpStochasticRoundFToFINTEL ||
1186+
OC == internal::OpClampStochasticRoundFToFINTEL)
1187+
return mapValue(BV, transSPIRVBuiltinFromInst(
1188+
static_cast<SPIRVInstruction *>(BV), BB));
11461189

11471190
if (OC == OpFConvert) {
11481191
CO = IsExt ? Instruction::FPExt : Instruction::FPTrunc;
@@ -2992,7 +3035,11 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
29923035
if (OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
29933036
OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
29943037
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
2995-
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT))
3038+
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
3039+
OutMatrixElementTy->isTypeFloat(
3040+
4, internal::FPEncodingFloat4E2M1INTEL) ||
3041+
InMatrixElementTy->isTypeFloat(4,
3042+
internal::FPEncodingFloat4E2M1INTEL))
29963043
Inst = transConvertInst(BV, F, BB);
29973044
else
29983045
Inst = transSPIRVBuiltinFromInst(BI, BB);
@@ -3001,6 +3048,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30013048
}
30023049
return mapValue(BV, Inst);
30033050
}
3051+
if (isIntelCvtOpCode(OC))
3052+
return mapValue(BV, transConvertInst(BV, F, BB));
30043053
return mapValue(
30053054
BV, transSPIRVBuiltinFromInst(static_cast<SPIRVInstruction *>(BV), BB));
30063055
}
@@ -3726,6 +3775,11 @@ Instruction *SPIRVToLLVM::transSPIRVBuiltinFromInst(SPIRVInstruction *BI,
37263775
case internal::OpTaskSequenceCreateINTEL:
37273776
case internal::OpConvertHandleToImageINTEL:
37283777
case internal::OpConvertHandleToSampledImageINTEL:
3778+
case internal::OpClampConvertFToFINTEL:
3779+
case internal::OpClampConvertFToSINTEL:
3780+
case internal::OpStochasticRoundFToFINTEL:
3781+
case internal::OpClampStochasticRoundFToFINTEL:
3782+
case internal::OpClampStochasticRoundFToSINTEL:
37293783
AddRetTypePostfix = true;
37303784
break;
37313785
default: {

‎lib/SPIRV/SPIRVToOCL.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -239,6 +239,10 @@ void SPIRVToOCLBase::visitCastInst(CastInst &Cast) {
239239
DstVecTy->getScalarSizeInBits() == 1)
240240
return;
241241

242+
// We don't have OpenCL builtins for 4-bit conversions.
243+
if (DstVecTy->getScalarSizeInBits() == 4 || SrcTy->getScalarSizeInBits() == 4)
244+
return;
245+
242246
// Assemble built-in name -> convert_gentypeN
243247
std::string CastBuiltInName(kOCLBuiltinName::ConvertPrefix);
244248
// Check if this is 'floating point -> unsigned integer' cast

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