Skip to content

Commit 7ef636d

Browse files
author
Dmitry Sidorov
committed
[Backport to 16] Implement SPV_INTEL_float4 and SPV_INTEL_fp_conversions extensions (KhronosGroup#3419)
As well as their appropriate conversions via __builtin_spirv mechanism. Specification: intel/llvm#20467 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
1 parent f4ed536 commit 7ef636d

File tree

17 files changed

+1139
-115
lines changed

17 files changed

+1139
-115
lines changed

‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,3 +83,5 @@ EXT(SPV_INTEL_shader_atomic_bfloat16)
8383
EXT(SPV_EXT_float8)
8484
EXT(SPV_INTEL_predicated_io)
8585
EXT(SPV_INTEL_sigmoid)
86+
EXT(SPV_INTEL_float4)
87+
EXT(SPV_INTEL_fp_conversions)

‎lib/SPIRV/SPIRVInternal.h‎

Lines changed: 112 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1060,6 +1060,7 @@ enum FPEncodingWrap {
10601060
BF16 = FPEncoding::FPEncodingBFloat16KHR,
10611061
E4M3 = FPEncoding::FPEncodingFloat8E4M3EXT,
10621062
E5M2 = FPEncoding::FPEncodingFloat8E5M2EXT,
1063+
E2M1 = internal::FPEncodingFloat4E2M1INTEL,
10631064
};
10641065

10651066
// Structure describing non-trivial conversions (FP8 and int4)
@@ -1088,36 +1089,117 @@ typedef SPIRVMap<llvm::StringRef, FPConversionDesc> FPConvertToEncodingMap;
10881089

10891090
// clang-format off
10901091
template <> inline void FPConvertToEncodingMap::init() {
1091-
// 8-bit conversions
1092-
add("ConvertE4M3ToFP16EXT",
1093-
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1094-
add("ConvertE5M2ToFP16EXT",
1095-
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1096-
add("ConvertE4M3ToBF16EXT",
1097-
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1098-
add("ConvertE5M2ToBF16EXT",
1099-
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1100-
add("ConvertFP16ToE4M3EXT",
1101-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1102-
add("ConvertFP16ToE5M2EXT",
1103-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1104-
add("ConvertBF16ToE4M3EXT",
1105-
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1106-
add("ConvertBF16ToE5M2EXT",
1107-
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1108-
1109-
add("ConvertInt4ToE4M3INTEL",
1110-
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1111-
add("ConvertInt4ToE5M2INTEL",
1112-
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1113-
add("ConvertInt4ToFP16INTEL",
1114-
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1115-
add("ConvertInt4ToBF16INTEL",
1116-
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1117-
add("ConvertFP16ToInt4INTEL",
1118-
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1119-
add("ConvertBF16ToInt4INTEL",
1120-
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1092+
// 4-bit conversions
1093+
add("ConvertE2M1ToE4M3INTEL",
1094+
{FPEncodingWrap::E2M1, FPEncodingWrap::E4M3, OpFConvert});
1095+
add("ConvertE2M1ToE5M2INTEL",
1096+
{FPEncodingWrap::E2M1, FPEncodingWrap::E5M2, OpFConvert});
1097+
add("ConvertE2M1ToFP16INTEL",
1098+
{FPEncodingWrap::E2M1, FPEncodingWrap::IEEE754, OpFConvert});
1099+
add("ConvertE2M1ToBF16INTEL",
1100+
{FPEncodingWrap::E2M1, FPEncodingWrap::BF16, OpFConvert});
1101+
1102+
add("ConvertInt4ToE4M3INTEL",
1103+
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1104+
add("ConvertInt4ToE5M2INTEL",
1105+
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1106+
add("ConvertInt4ToFP16INTEL",
1107+
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1108+
add("ConvertInt4ToBF16INTEL",
1109+
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1110+
add("ConvertInt4ToInt8INTEL",
1111+
{FPEncodingWrap::Integer, FPEncodingWrap::Integer, OpSConvert});
1112+
1113+
add("ConvertFP16ToE2M1INTEL",
1114+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1, OpFConvert});
1115+
add("ConvertBF16ToE2M1INTEL",
1116+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1, OpFConvert});
1117+
add("ConvertFP16ToInt4INTEL",
1118+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1119+
add("ConvertBF16ToInt4INTEL",
1120+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1121+
1122+
// 8-bit conversions
1123+
add("ConvertE4M3ToFP16EXT",
1124+
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1125+
add("ConvertE5M2ToFP16EXT",
1126+
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1127+
add("ConvertE4M3ToBF16EXT",
1128+
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1129+
add("ConvertE5M2ToBF16EXT",
1130+
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1131+
add("ConvertFP16ToE4M3EXT",
1132+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1133+
add("ConvertFP16ToE5M2EXT",
1134+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1135+
add("ConvertBF16ToE4M3EXT",
1136+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1137+
add("ConvertBF16ToE5M2EXT",
1138+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1139+
1140+
// SPV_INTEL_fp_conversions
1141+
add("ClampConvertFP16ToE2M1INTEL",
1142+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1143+
internal::OpClampConvertFToFINTEL});
1144+
add("ClampConvertBF16ToE2M1INTEL",
1145+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1146+
internal::OpClampConvertFToFINTEL});
1147+
add("ClampConvertFP16ToE4M3INTEL",
1148+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1149+
internal::OpClampConvertFToFINTEL});
1150+
add("ClampConvertBF16ToE4M3INTEL",
1151+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1152+
internal::OpClampConvertFToFINTEL});
1153+
add("ClampConvertFP16ToE5M2INTEL",
1154+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1155+
internal::OpClampConvertFToFINTEL});
1156+
add("ClampConvertBF16ToE5M2INTEL",
1157+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1158+
internal::OpClampConvertFToFINTEL});
1159+
add("ClampConvertFP16ToInt4INTEL",
1160+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1161+
internal::OpClampConvertFToSINTEL});
1162+
add("ClampConvertBF16ToInt4INTEL",
1163+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1164+
internal::OpClampConvertFToSINTEL});
1165+
1166+
add("StochasticRoundFP16ToE5M2INTEL",
1167+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1168+
internal::OpStochasticRoundFToFINTEL});
1169+
add("StochasticRoundFP16ToE4M3INTEL",
1170+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1171+
internal::OpStochasticRoundFToFINTEL});
1172+
add("StochasticRoundBF16ToE5M2INTEL",
1173+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1174+
internal::OpStochasticRoundFToFINTEL});
1175+
add("StochasticRoundBF16ToE4M3INTEL",
1176+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1177+
internal::OpStochasticRoundFToFINTEL});
1178+
add("StochasticRoundFP16ToE2M1INTEL",
1179+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1180+
internal::OpStochasticRoundFToFINTEL});
1181+
add("StochasticRoundBF16ToE2M1INTEL",
1182+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1183+
internal::OpStochasticRoundFToFINTEL});
1184+
add("ClampStochasticRoundFP16ToInt4INTEL",
1185+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1186+
internal::OpClampStochasticRoundFToSINTEL});
1187+
add("ClampStochasticRoundBF16ToInt4INTEL",
1188+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1189+
internal::OpClampStochasticRoundFToSINTEL});
1190+
1191+
add("ClampStochasticRoundFP16ToE5M2INTEL",
1192+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1193+
internal::OpClampStochasticRoundFToFINTEL});
1194+
add("ClampStochasticRoundFP16ToE4M3INTEL",
1195+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1196+
internal::OpClampStochasticRoundFToFINTEL});
1197+
add("ClampStochasticRoundBF16ToE5M2INTEL",
1198+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1199+
internal::OpClampStochasticRoundFToFINTEL});
1200+
add("ClampStochasticRoundBF16ToE4M3INTEL",
1201+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1202+
internal::OpClampStochasticRoundFToFINTEL});
11211203
}
11221204

11231205
// clang-format on

‎lib/SPIRV/SPIRVReader.cpp‎

Lines changed: 61 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -312,8 +312,11 @@ std::optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
312312

313313
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
314314
switch (T->getFloatBitWidth()) {
315+
case 4:
316+
// No LLVM IR counter part for FP4 - map it on i4.
317+
return Type::getIntNTy(*Context, 4);
315318
case 8:
316-
// No LLVM IR counter part for FP8 - map it on i8
319+
// No LLVM IR counter part for FP8 - map it on i8.
317320
return Type::getIntNTy(*Context, 8);
318321
case 16:
319322
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
@@ -1050,11 +1053,12 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10501053
return FPEncodingWrap::IEEE754;
10511054
};
10521055

1053-
auto IsFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1054-
return Encoding == FPEncodingWrap::E4M3 || Encoding == FPEncodingWrap::E5M2;
1056+
auto IsFP4OrFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1057+
return Encoding == FPEncodingWrap::E4M3 ||
1058+
Encoding == FPEncodingWrap::E5M2 || Encoding == FPEncodingWrap::E2M1;
10551059
};
10561060

1057-
switch (BC->getOpCode()) {
1061+
switch (static_cast<unsigned>(BC->getOpCode())) {
10581062
case OpPtrCastToGeneric:
10591063
case OpGenericCastToPtr:
10601064
case OpPtrCastToCrossWorkgroupINTEL:
@@ -1075,6 +1079,11 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10751079
case OpUConvert:
10761080
CO = IsExt ? Instruction::ZExt : Instruction::Trunc;
10771081
break;
1082+
case internal::OpClampConvertFToFINTEL:
1083+
case internal::OpClampConvertFToSINTEL:
1084+
case internal::OpStochasticRoundFToFINTEL:
1085+
case internal::OpClampStochasticRoundFToFINTEL:
1086+
case internal::OpClampStochasticRoundFToSINTEL:
10781087
case OpConvertSToF:
10791088
case OpConvertFToS:
10801089
case OpConvertUToF:
@@ -1099,7 +1108,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
10991108

11001109
FPEncodingWrap SrcEnc = GetEncodingAndUpdateType(SPVSrcTy);
11011110
FPEncodingWrap DstEnc = GetEncodingAndUpdateType(SPVDstTy);
1102-
if (IsFP8Encoding(SrcEnc) || IsFP8Encoding(DstEnc) ||
1111+
if (IsFP4OrFP8Encoding(SrcEnc) || IsFP4OrFP8Encoding(DstEnc) ||
11031112
SPVSrcTy->isTypeInt(4) || SPVDstTy->isTypeInt(4)) {
11041113
FPConversionDesc FPDesc = {SrcEnc, DstEnc, BC->getOpCode()};
11051114
auto Conv = SPIRV::FPConvertToEncodingMap::rmap(FPDesc);
@@ -1109,13 +1118,47 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11091118
std::string BuiltinName =
11101119
kSPIRVName::InternalBuiltinPrefix + std::string(Conv);
11111120
BuiltinFuncMangleInfo Info;
1112-
std::string MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1121+
std::string MangledName;
1122+
// Translate additional Ops for stochastic conversions.
1123+
if (OC == internal::OpStochasticRoundFToFINTEL ||
1124+
OC == internal::OpClampStochasticRoundFToFINTEL ||
1125+
OC == internal::OpClampStochasticRoundFToSINTEL) {
1126+
// Seed.
1127+
Ops.emplace_back(transValue(SPVOps[1], F, BB, true));
1128+
OpsTys.emplace_back(Ops[1]->getType());
1129+
constexpr unsigned MaxOpsSize = 3;
1130+
if (SPVOps.size() == MaxOpsSize) {
1131+
// New Seed.
1132+
Ops.emplace_back(transValue(SPVOps[2], F, BB, true));
1133+
1134+
// The following mess is needed to create a function with correct
1135+
// mangling.
1136+
SPIRVType *PtrTy = SPVOps[2]->getType();
1137+
const unsigned AS =
1138+
SPIRSPIRVAddrSpaceMap::rmap(PtrTy->getPointerStorageClass());
1139+
Type *ElementTy = transType(PtrTy->getPointerElementType());
1140+
OpsTys.emplace_back(TypedPointerType::get(ElementTy, AS));
1141+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
1142+
// But to create function itself we need untyped pointer type.
1143+
OpsTys[2] = opaquifyType(OpsTys[2]);
1144+
}
1145+
}
1146+
1147+
if (MangledName.empty())
1148+
MangledName = mangleBuiltin(BuiltinName, OpsTys, &Info);
11131149

11141150
FunctionType *FTy = FunctionType::get(Dst, OpsTys, false);
11151151
FunctionCallee Func = M->getOrInsertFunction(MangledName, FTy);
11161152
return CallInst::Create(Func, Ops, "", BB);
11171153
}
11181154
}
1155+
// These conversions can be done without __builtin_spirv prefixed functions
1156+
// as their operand and result types have native representation in LLVM IR.
1157+
if (OC == internal::OpClampConvertFToFINTEL ||
1158+
OC == internal::OpStochasticRoundFToFINTEL ||
1159+
OC == internal::OpClampStochasticRoundFToFINTEL)
1160+
return mapValue(BV, transSPIRVBuiltinFromInst(
1161+
static_cast<SPIRVInstruction *>(BV), BB));
11191162

11201163
if (OC == OpFConvert) {
11211164
CO = IsExt ? Instruction::FPExt : Instruction::FPTrunc;
@@ -2963,7 +3006,11 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
29633006
if (OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
29643007
OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
29653008
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
2966-
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT))
3009+
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
3010+
OutMatrixElementTy->isTypeFloat(
3011+
4, internal::FPEncodingFloat4E2M1INTEL) ||
3012+
InMatrixElementTy->isTypeFloat(4,
3013+
internal::FPEncodingFloat4E2M1INTEL))
29673014
Inst = transConvertInst(BV, F, BB);
29683015
else
29693016
Inst = transSPIRVBuiltinFromInst(BI, BB);
@@ -2972,6 +3019,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
29723019
}
29733020
return mapValue(BV, Inst);
29743021
}
3022+
if (isIntelCvtOpCode(OC))
3023+
return mapValue(BV, transConvertInst(BV, F, BB));
29753024
return mapValue(
29763025
BV, transSPIRVBuiltinFromInst(static_cast<SPIRVInstruction *>(BV), BB));
29773026
}
@@ -3695,6 +3744,11 @@ Instruction *SPIRVToLLVM::transSPIRVBuiltinFromInst(SPIRVInstruction *BI,
36953744
case internal::OpCooperativeMatrixLoadCheckedINTEL:
36963745
case internal::OpConvertHandleToImageINTEL:
36973746
case internal::OpConvertHandleToSampledImageINTEL:
3747+
case internal::OpClampConvertFToFINTEL:
3748+
case internal::OpClampConvertFToSINTEL:
3749+
case internal::OpStochasticRoundFToFINTEL:
3750+
case internal::OpClampStochasticRoundFToFINTEL:
3751+
case internal::OpClampStochasticRoundFToSINTEL:
36983752
AddRetTypePostfix = true;
36993753
break;
37003754
default: {

‎lib/SPIRV/SPIRVToOCL.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -234,6 +234,10 @@ void SPIRVToOCLBase::visitCastInst(CastInst &Cast) {
234234
DstVecTy->getScalarSizeInBits() == 1)
235235
return;
236236

237+
// We don't have OpenCL builtins for 4-bit conversions.
238+
if (DstVecTy->getScalarSizeInBits() == 4 || SrcTy->getScalarSizeInBits() == 4)
239+
return;
240+
237241
// Assemble built-in name -> convert_gentypeN
238242
std::string CastBuiltInName(kOCLBuiltinName::ConvertPrefix);
239243
// Check if this is 'floating point -> unsigned integer' cast

0 commit comments

Comments
 (0)