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Dmitry Sidorov
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[Backport to 15] Implement SPV_INTEL_float4 and SPV_INTEL_fp_conversions extensions (KhronosGroup#3419)
As well as their appropriate conversions via __builtin_spirv mechanism. Specification: intel/llvm#20467 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
1 parent 265be10 commit a5acd14

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15 files changed

+1102
-105
lines changed

15 files changed

+1102
-105
lines changed

‎include/LLVMSPIRVExtensions.inc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,3 +83,5 @@ EXT(SPV_INTEL_shader_atomic_bfloat16)
8383
EXT(SPV_EXT_float8)
8484
EXT(SPV_INTEL_predicated_io)
8585
EXT(SPV_INTEL_sigmoid)
86+
EXT(SPV_INTEL_float4)
87+
EXT(SPV_INTEL_fp_conversions)

‎lib/SPIRV/SPIRVInternal.h‎

Lines changed: 112 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1145,6 +1145,7 @@ enum FPEncodingWrap {
11451145
BF16 = FPEncoding::FPEncodingBFloat16KHR,
11461146
E4M3 = FPEncoding::FPEncodingFloat8E4M3EXT,
11471147
E5M2 = FPEncoding::FPEncodingFloat8E5M2EXT,
1148+
E2M1 = internal::FPEncodingFloat4E2M1INTEL,
11481149
};
11491150

11501151
// Structure describing non-trivial conversions (FP8 and int4)
@@ -1174,36 +1175,117 @@ typedef SPIRVMap<llvm::StringRef, FPConversionDesc> FPConvertToEncodingMap;
11741175

11751176
// clang-format off
11761177
template <> inline void FPConvertToEncodingMap::init() {
1177-
// 8-bit conversions
1178-
add("ConvertE4M3ToFP16EXT",
1179-
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1180-
add("ConvertE5M2ToFP16EXT",
1181-
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1182-
add("ConvertE4M3ToBF16EXT",
1183-
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1184-
add("ConvertE5M2ToBF16EXT",
1185-
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1186-
add("ConvertFP16ToE4M3EXT",
1187-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1188-
add("ConvertFP16ToE5M2EXT",
1189-
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1190-
add("ConvertBF16ToE4M3EXT",
1191-
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1192-
add("ConvertBF16ToE5M2EXT",
1193-
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1194-
1195-
add("ConvertInt4ToE4M3INTEL",
1196-
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1197-
add("ConvertInt4ToE5M2INTEL",
1198-
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1199-
add("ConvertInt4ToFP16INTEL",
1200-
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1201-
add("ConvertInt4ToBF16INTEL",
1202-
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1203-
add("ConvertFP16ToInt4INTEL",
1204-
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1205-
add("ConvertBF16ToInt4INTEL",
1206-
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1178+
// 4-bit conversions
1179+
add("ConvertE2M1ToE4M3INTEL",
1180+
{FPEncodingWrap::E2M1, FPEncodingWrap::E4M3, OpFConvert});
1181+
add("ConvertE2M1ToE5M2INTEL",
1182+
{FPEncodingWrap::E2M1, FPEncodingWrap::E5M2, OpFConvert});
1183+
add("ConvertE2M1ToFP16INTEL",
1184+
{FPEncodingWrap::E2M1, FPEncodingWrap::IEEE754, OpFConvert});
1185+
add("ConvertE2M1ToBF16INTEL",
1186+
{FPEncodingWrap::E2M1, FPEncodingWrap::BF16, OpFConvert});
1187+
1188+
add("ConvertInt4ToE4M3INTEL",
1189+
{FPEncodingWrap::Integer, FPEncodingWrap::E4M3, OpConvertSToF});
1190+
add("ConvertInt4ToE5M2INTEL",
1191+
{FPEncodingWrap::Integer, FPEncodingWrap::E5M2, OpConvertSToF});
1192+
add("ConvertInt4ToFP16INTEL",
1193+
{FPEncodingWrap::Integer, FPEncodingWrap::IEEE754, OpConvertSToF});
1194+
add("ConvertInt4ToBF16INTEL",
1195+
{FPEncodingWrap::Integer, FPEncodingWrap::BF16, OpConvertSToF});
1196+
add("ConvertInt4ToInt8INTEL",
1197+
{FPEncodingWrap::Integer, FPEncodingWrap::Integer, OpSConvert});
1198+
1199+
add("ConvertFP16ToE2M1INTEL",
1200+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1, OpFConvert});
1201+
add("ConvertBF16ToE2M1INTEL",
1202+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1, OpFConvert});
1203+
add("ConvertFP16ToInt4INTEL",
1204+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer, OpConvertFToS});
1205+
add("ConvertBF16ToInt4INTEL",
1206+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer, OpConvertFToS});
1207+
1208+
// 8-bit conversions
1209+
add("ConvertE4M3ToFP16EXT",
1210+
{FPEncodingWrap::E4M3, FPEncodingWrap::IEEE754, OpFConvert});
1211+
add("ConvertE5M2ToFP16EXT",
1212+
{FPEncodingWrap::E5M2, FPEncodingWrap::IEEE754, OpFConvert});
1213+
add("ConvertE4M3ToBF16EXT",
1214+
{FPEncodingWrap::E4M3, FPEncodingWrap::BF16, OpFConvert});
1215+
add("ConvertE5M2ToBF16EXT",
1216+
{FPEncodingWrap::E5M2, FPEncodingWrap::BF16, OpFConvert});
1217+
add("ConvertFP16ToE4M3EXT",
1218+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3, OpFConvert});
1219+
add("ConvertFP16ToE5M2EXT",
1220+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2, OpFConvert});
1221+
add("ConvertBF16ToE4M3EXT",
1222+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3, OpFConvert});
1223+
add("ConvertBF16ToE5M2EXT",
1224+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2, OpFConvert});
1225+
1226+
// SPV_INTEL_fp_conversions
1227+
add("ClampConvertFP16ToE2M1INTEL",
1228+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1229+
internal::OpClampConvertFToFINTEL});
1230+
add("ClampConvertBF16ToE2M1INTEL",
1231+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1232+
internal::OpClampConvertFToFINTEL});
1233+
add("ClampConvertFP16ToE4M3INTEL",
1234+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1235+
internal::OpClampConvertFToFINTEL});
1236+
add("ClampConvertBF16ToE4M3INTEL",
1237+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1238+
internal::OpClampConvertFToFINTEL});
1239+
add("ClampConvertFP16ToE5M2INTEL",
1240+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1241+
internal::OpClampConvertFToFINTEL});
1242+
add("ClampConvertBF16ToE5M2INTEL",
1243+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1244+
internal::OpClampConvertFToFINTEL});
1245+
add("ClampConvertFP16ToInt4INTEL",
1246+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1247+
internal::OpClampConvertFToSINTEL});
1248+
add("ClampConvertBF16ToInt4INTEL",
1249+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1250+
internal::OpClampConvertFToSINTEL});
1251+
1252+
add("StochasticRoundFP16ToE5M2INTEL",
1253+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1254+
internal::OpStochasticRoundFToFINTEL});
1255+
add("StochasticRoundFP16ToE4M3INTEL",
1256+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1257+
internal::OpStochasticRoundFToFINTEL});
1258+
add("StochasticRoundBF16ToE5M2INTEL",
1259+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1260+
internal::OpStochasticRoundFToFINTEL});
1261+
add("StochasticRoundBF16ToE4M3INTEL",
1262+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1263+
internal::OpStochasticRoundFToFINTEL});
1264+
add("StochasticRoundFP16ToE2M1INTEL",
1265+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E2M1,
1266+
internal::OpStochasticRoundFToFINTEL});
1267+
add("StochasticRoundBF16ToE2M1INTEL",
1268+
{FPEncodingWrap::BF16, FPEncodingWrap::E2M1,
1269+
internal::OpStochasticRoundFToFINTEL});
1270+
add("ClampStochasticRoundFP16ToInt4INTEL",
1271+
{FPEncodingWrap::IEEE754, FPEncodingWrap::Integer,
1272+
internal::OpClampStochasticRoundFToSINTEL});
1273+
add("ClampStochasticRoundBF16ToInt4INTEL",
1274+
{FPEncodingWrap::BF16, FPEncodingWrap::Integer,
1275+
internal::OpClampStochasticRoundFToSINTEL});
1276+
1277+
add("ClampStochasticRoundFP16ToE5M2INTEL",
1278+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E5M2,
1279+
internal::OpClampStochasticRoundFToFINTEL});
1280+
add("ClampStochasticRoundFP16ToE4M3INTEL",
1281+
{FPEncodingWrap::IEEE754, FPEncodingWrap::E4M3,
1282+
internal::OpClampStochasticRoundFToFINTEL});
1283+
add("ClampStochasticRoundBF16ToE5M2INTEL",
1284+
{FPEncodingWrap::BF16, FPEncodingWrap::E5M2,
1285+
internal::OpClampStochasticRoundFToFINTEL});
1286+
add("ClampStochasticRoundBF16ToE4M3INTEL",
1287+
{FPEncodingWrap::BF16, FPEncodingWrap::E4M3,
1288+
internal::OpClampStochasticRoundFToFINTEL});
12071289
}
12081290

12091291
// clang-format on

‎lib/SPIRV/SPIRVReader.cpp‎

Lines changed: 33 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -310,8 +310,11 @@ llvm::Optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
310310

311311
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
312312
switch (T->getFloatBitWidth()) {
313+
case 4:
314+
// No LLVM IR counter part for FP4 - map it on i4.
315+
return Type::getIntNTy(*Context, 4);
313316
case 8:
314-
// No LLVM IR counter part for FP8 - map it on i8
317+
// No LLVM IR counter part for FP8 - map it on i8.
315318
return Type::getIntNTy(*Context, 8);
316319
case 16:
317320
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
@@ -1171,11 +1174,12 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11711174
return FPEncodingWrap::IEEE754;
11721175
};
11731176

1174-
auto IsFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1175-
return Encoding == FPEncodingWrap::E4M3 || Encoding == FPEncodingWrap::E5M2;
1177+
auto IsFP4OrFP8Encoding = [](FPEncodingWrap Encoding) -> bool {
1178+
return Encoding == FPEncodingWrap::E4M3 ||
1179+
Encoding == FPEncodingWrap::E5M2 || Encoding == FPEncodingWrap::E2M1;
11761180
};
11771181

1178-
switch (BC->getOpCode()) {
1182+
switch (static_cast<unsigned>(BC->getOpCode())) {
11791183
case OpPtrCastToGeneric:
11801184
case OpGenericCastToPtr:
11811185
case OpPtrCastToCrossWorkgroupINTEL:
@@ -1196,6 +1200,11 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
11961200
case OpUConvert:
11971201
CO = IsExt ? Instruction::ZExt : Instruction::Trunc;
11981202
break;
1203+
case internal::OpClampConvertFToFINTEL:
1204+
case internal::OpClampConvertFToSINTEL:
1205+
case internal::OpStochasticRoundFToFINTEL:
1206+
case internal::OpClampStochasticRoundFToFINTEL:
1207+
case internal::OpClampStochasticRoundFToSINTEL:
11991208
case OpConvertSToF:
12001209
case OpConvertFToS:
12011210
case OpConvertUToF:
@@ -1220,7 +1229,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
12201229

12211230
FPEncodingWrap SrcEnc = GetEncodingAndUpdateType(SPVSrcTy);
12221231
FPEncodingWrap DstEnc = GetEncodingAndUpdateType(SPVDstTy);
1223-
if (IsFP8Encoding(SrcEnc) || IsFP8Encoding(DstEnc) ||
1232+
if (IsFP4OrFP8Encoding(SrcEnc) || IsFP4OrFP8Encoding(DstEnc) ||
12241233
SPVSrcTy->isTypeInt(4) || SPVDstTy->isTypeInt(4)) {
12251234
FPConversionDesc FPDesc = {SrcEnc, DstEnc, BC->getOpCode()};
12261235
auto Conv = SPIRV::FPConvertToEncodingMap::rmap(FPDesc);
@@ -1263,6 +1272,13 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *BV, Function *F,
12631272
return CallInst::Create(Func, Ops, "", BB);
12641273
}
12651274
}
1275+
// These conversions can be done without __builtin_spirv prefixed functions
1276+
// as their operand and result types have native representation in LLVM IR.
1277+
if (OC == internal::OpClampConvertFToFINTEL ||
1278+
OC == internal::OpStochasticRoundFToFINTEL ||
1279+
OC == internal::OpClampStochasticRoundFToFINTEL)
1280+
return mapValue(BV, transSPIRVBuiltinFromInst(
1281+
static_cast<SPIRVInstruction *>(BV), BB));
12661282

12671283
if (OC == OpFConvert) {
12681284
CO = IsExt ? Instruction::FPExt : Instruction::FPTrunc;
@@ -3088,7 +3104,11 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30883104
if (OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
30893105
OutMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
30903106
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E4M3EXT) ||
3091-
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT))
3107+
InMatrixElementTy->isTypeFloat(8, FPEncodingFloat8E5M2EXT) ||
3108+
OutMatrixElementTy->isTypeFloat(
3109+
4, internal::FPEncodingFloat4E2M1INTEL) ||
3110+
InMatrixElementTy->isTypeFloat(4,
3111+
internal::FPEncodingFloat4E2M1INTEL))
30923112
Inst = transConvertInst(BV, F, BB);
30933113
else
30943114
Inst = transSPIRVBuiltinFromInst(BI, BB);
@@ -3097,6 +3117,8 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
30973117
}
30983118
return mapValue(BV, Inst);
30993119
}
3120+
if (isIntelCvtOpCode(OC))
3121+
return mapValue(BV, transConvertInst(BV, F, BB));
31003122
return mapValue(
31013123
BV, transSPIRVBuiltinFromInst(static_cast<SPIRVInstruction *>(BV), BB));
31023124
}
@@ -3818,6 +3840,11 @@ Instruction *SPIRVToLLVM::transSPIRVBuiltinFromInst(SPIRVInstruction *BI,
38183840
case internal::OpCooperativeMatrixLoadCheckedINTEL:
38193841
case internal::OpConvertHandleToImageINTEL:
38203842
case internal::OpConvertHandleToSampledImageINTEL:
3843+
case internal::OpClampConvertFToFINTEL:
3844+
case internal::OpClampConvertFToSINTEL:
3845+
case internal::OpStochasticRoundFToFINTEL:
3846+
case internal::OpClampStochasticRoundFToFINTEL:
3847+
case internal::OpClampStochasticRoundFToSINTEL:
38213848
AddRetTypePostfix = true;
38223849
break;
38233850
default: {

‎lib/SPIRV/SPIRVToOCL.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -237,6 +237,10 @@ void SPIRVToOCLBase::visitCastInst(CastInst &Cast) {
237237
DstVecTy->getScalarSizeInBits() == 1)
238238
return;
239239

240+
// We don't have OpenCL builtins for 4-bit conversions.
241+
if (DstVecTy->getScalarSizeInBits() == 4 || SrcTy->getScalarSizeInBits() == 4)
242+
return;
243+
240244
// Assemble built-in name -> convert_gentypeN
241245
std::string CastBuiltInName(kOCLBuiltinName::ConvertPrefix);
242246
// Check if this is 'floating point -> unsigned integer' cast

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