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1 | 1 | /////////////////////////////////////////////////////////////////////////////// |
2 | 2 | // mu2edaq22 : DTC0: ROC tower |
3 | | -// init_run_configuration : the name and the call signature are is fixed |
| 3 | +// init_run_configuration : the name and the call signature are is fixed |
4 | 4 | // and can't be changed |
5 | 5 | /////////////////////////////////////////////////////////////////////////////// |
6 | 6 | #include "otsdaq-mu2e-tracker/Gui/DtcGui.hh" |
7 | | -int init_run_configuration(DtcGui* X) { |
8 | | - int rc(0); |
| 7 | +int init_run_configuration(DtcGui* X) |
| 8 | +{ |
| 9 | + int rc(0); |
9 | 10 |
|
10 | | - printf("[init_run_configuration] : host:%s\n",gSystem->Getenv("HOSTNAME")); |
| 11 | + printf("[init_run_configuration] : host:%s\n", gSystem->Getenv("HOSTNAME")); |
11 | 12 |
|
12 | | - DtcGui::DtcData_t* dtc = (DtcGui::DtcData_t*) X->fDtcData; |
| 13 | + DtcGui::DtcData_t* dtc = (DtcGui::DtcData_t*)X->fDtcData; |
13 | 14 |
|
14 | | - X->fNDtcs = 1; // 2; // installed on a machine |
| 15 | + X->fNDtcs = 1; // 2; // installed on a machine |
15 | 16 |
|
16 | | - // dtc[0].fName = "CFO"; |
17 | | - // dtc[0].fPcieAddr = 0; |
18 | | - // dtc[0].fLinkMask = 0x2; // 2 DTCs on link0 |
19 | | - // gSystem->Setenv("CFOLIB_CFO","0"); |
| 17 | + // dtc[0].fName = "CFO"; |
| 18 | + // dtc[0].fPcieAddr = 0; |
| 19 | + // dtc[0].fLinkMask = 0x2; // 2 DTCs on link0 |
| 20 | + // gSystem->Setenv("CFOLIB_CFO","0"); |
20 | 21 |
|
21 | | - dtc[0].fName = "DTC"; |
22 | | - dtc[0].fPcieAddr = 0; |
23 | | - // dtc[0].fLinkMask = 0x111111; // 6 ROCs |
24 | | - dtc[0].fLinkMask = 0x000010; // TS1 : ROC1@DTC0 |
25 | | - dtc[0].fRocReadoutMode = 0; // 0:patterns 1:digis |
26 | | - dtc[0].fRocLaneMask = 0xf; // 0:patterns 1:digis |
27 | | - dtc[0].fROcNHitsPerLane = 10; // for mode=2; |
28 | | - |
29 | | - dtc[0].fJAMode = 0x01; // ROC tower@IERC: external clock (internal_clock << 4) + reset |
30 | | - dtc[0].fEmulateCfo = 1; // |
| 22 | + dtc[0].fName = "DTC"; |
| 23 | + dtc[0].fPcieAddr = 0; |
| 24 | + // dtc[0].fLinkMask = 0x111111; // 6 ROCs |
| 25 | + dtc[0].fLinkMask = 0x000010; // TS1 : ROC1@DTC0 |
| 26 | + dtc[0].fRocReadoutMode = 0; // 0:patterns 1:digis |
| 27 | + dtc[0].fRocLaneMask = 0xf; // 0:patterns 1:digis |
| 28 | + dtc[0].fROcNHitsPerLane = 10; // for mode=2; |
31 | 29 |
|
32 | | - dtc[0].fDtcID = 44; // for one machine, make it the same as the PcieAddr |
33 | | - dtc[0].fPartitionID = 0; |
34 | | - dtc[0].fEventMode = 1; |
35 | | - dtc[0].fOnSpill = 1; |
36 | | - dtc[0].fMacAddrByte = -1; |
| 30 | + dtc[0].fJAMode = |
| 31 | + 0x01; // ROC tower@IERC: external clock (internal_clock << 4) + reset |
| 32 | + dtc[0].fEmulateCfo = 1; // |
37 | 33 |
|
38 | | - gSystem->Setenv("DTCLIB_DTC","0"); |
| 34 | + dtc[0].fDtcID = 44; // for one machine, make it the same as the PcieAddr |
| 35 | + dtc[0].fPartitionID = 0; |
| 36 | + dtc[0].fEventMode = 1; |
| 37 | + dtc[0].fOnSpill = 1; |
| 38 | + dtc[0].fMacAddrByte = -1; |
39 | 39 |
|
40 | | - return rc; |
| 40 | + gSystem->Setenv("DTCLIB_DTC", "0"); |
| 41 | + |
| 42 | + return rc; |
41 | 43 | } |
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