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This repository was archived by the owner on Jun 5, 2019. It is now read-only.

Commit 0b06b90

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Updated formatting and include file case based on review feedback
1 parent 04985eb commit 0b06b90

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3 files changed

+36
-2
lines changed

3 files changed

+36
-2
lines changed

CLR/Libraries/Windows_Devices/windows_devices_native_Windows_Devices_Spi_SpiBusInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
// Copyright (c) Microsoft Corporation. All rights reserved.
33
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
44

5-
#include "Windows_Devices.h"
5+
#include "Windows_devices.h"
66

77
// [MethodImplAttribute( MethodImplOptions.InternalCall )]
88
// extern internal SpiBusInfo( int busNum );

DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_SPI/STM32F4_SPI_functions.cpp

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,9 @@ BOOL CPU_SPI_nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* W
6161
{
6262
NATIVE_PROFILE_HAL_PROCESSOR_SPI();
6363
if(!CPU_SPI_Xaction_Start( Configuration ))
64+
{
6465
return FALSE;
66+
}
6567

6668
SPI_XACTION_16 Transaction;
6769
Transaction.Read16 = Read16;
@@ -71,7 +73,9 @@ BOOL CPU_SPI_nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* W
7173
Transaction.WriteCount = WriteCount;
7274
Transaction.SPI_mod = Configuration.SPI_mod;
7375
if(!CPU_SPI_Xaction_nWrite16_nRead16( Transaction ))
76+
{
7477
return FALSE;
78+
}
7579

7680
return CPU_SPI_Xaction_Stop( Configuration );
7781
}
@@ -80,7 +84,9 @@ BOOL CPU_SPI_nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Writ
8084
{
8185
NATIVE_PROFILE_HAL_PROCESSOR_SPI();
8286
if(!CPU_SPI_Xaction_Start( Configuration ))
87+
{
8388
return FALSE;
89+
}
8490

8591
SPI_XACTION_8 Transaction;
8692
Transaction.Read8 = Read8;
@@ -90,7 +96,9 @@ BOOL CPU_SPI_nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Writ
9096
Transaction.WriteCount = WriteCount;
9197
Transaction.SPI_mod = Configuration.SPI_mod;
9298
if(!CPU_SPI_Xaction_nWrite8_nRead8( Transaction ))
99+
{
93100
return FALSE;
101+
}
94102

95103
return CPU_SPI_Xaction_Stop( Configuration );
96104
}
@@ -133,13 +141,19 @@ BOOL CPU_SPI_Xaction_Start( const SPI_CONFIGURATION& Configuration )
133141
// set mode bits
134142
UINT32 cr1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR | SPI_CR1_SPE;
135143
if (Configuration.MD_16bits)
144+
{
136145
cr1 |= SPI_CR1_DFF;
146+
}
137147

138148
if (Configuration.MSK_IDLE)
149+
{
139150
cr1 |= SPI_CR1_CPOL | SPI_CR1_CPHA;
151+
}
140152

141153
if (!Configuration.MSK_SampleEdge)
154+
{
142155
cr1 ^= SPI_CR1_CPHA; // toggle phase
156+
}
143157

144158
// set clock prescaler
145159
UINT32 clock = SYSTEM_APB2_CLOCK_HZ / 2000; // SPI1 on APB2
@@ -171,7 +185,9 @@ BOOL CPU_SPI_Xaction_Start( const SPI_CONFIGURATION& Configuration )
171185
CPU_SPI_GetPins(Configuration.SPI_mod, msk, miso, mosi);
172186
UINT32 alternate = 0x252; // AF5, speed = 2 (50MHz)
173187
if (Configuration.SPI_mod == 2 && mosi != 54)
188+
{
174189
alternate = 0x262; // SPI3 on AF6
190+
}
175191

176192
CPU_GPIO_DisablePin( msk, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)alternate);
177193
CPU_GPIO_DisablePin( miso, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)alternate);
@@ -199,10 +215,13 @@ BOOL CPU_SPI_Xaction_Stop( const SPI_CONFIGURATION& Configuration )
199215
{
200216
HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Hold_uSecs );
201217
}
218+
202219
CPU_GPIO_SetPinState( Configuration.DeviceCS, !Configuration.CS_Active );
203220
GPIO_RESISTOR res = RESISTOR_PULLDOWN;
204221
if (Configuration.MSK_IDLE)
222+
{
205223
res = RESISTOR_PULLUP;
224+
}
206225

207226
GPIO_PIN msk, miso, mosi;
208227
CPU_SPI_GetPins(Configuration.SPI_mod, msk, miso, mosi);
@@ -268,7 +287,9 @@ BOOL CPU_SPI_Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction )
268287
while (++i < num)
269288
{
270289
if (i < outLen)
290+
{
271291
out = outBuf[i]; // get new output data
292+
}
272293

273294
while (!(spi->SR & SPI_SR_RXNE))
274295
{ /* wait for Rx buffer full */ }
@@ -317,22 +338,29 @@ BOOL CPU_SPI_Xaction_nWrite8_nRead8( SPI_XACTION_8& Transaction )
317338
while (++i < num)
318339
{
319340
if (i < outLen)
341+
{
320342
out = outBuf[i]; // get new output data
343+
}
321344

322345
while (!(spi->SR & SPI_SR_RXNE))
323346
{ /* wait for Rx buffer full */ }
324347

325348
in = spi->DR; // read input
326349
spi->DR = out; // start output
327-
if (ii >= 0) inBuf[ii] = (UINT8)in; // save input data
350+
if (ii >= 0)
351+
{
352+
inBuf[ii] = (UINT8)in; // save input data
353+
}
328354
ii++;
329355
}
330356
while (!(spi->SR & SPI_SR_RXNE))
331357
{ /* wait for Rx buffer full */ }
332358

333359
in = spi->DR; // read last input
334360
if (ii >= 0)
361+
{
335362
inBuf[ii] = (UINT8)in; // save last input
363+
}
336364

337365
return TRUE;
338366
}
@@ -348,7 +376,9 @@ void CPU_SPI_GetPins( UINT32 spi_mod, GPIO_PIN& msk, GPIO_PIN& miso, GPIO_PIN& m
348376
NATIVE_PROFILE_HAL_PROCESSOR_SPI();
349377
msk = miso = mosi = GPIO_PIN_NONE;
350378
if (spi_mod >= STM32F4_SPI_MODS)
379+
{
351380
return;
381+
}
352382

353383
msk = g_STM32F4_Spi_Sclk_Pins[spi_mod];
354384
miso = g_STM32F4_Spi_Miso_Pins[spi_mod];

Framework/Core/Windows/Devices/Spi/SpiDevice.cs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -250,12 +250,16 @@ private static int GetBusNum( string deviceId )
250250
for( int i = 0; i < spiBusNames.Length; ++i )
251251
{
252252
if( spiBusNames[ i ] == deviceId )
253+
{
253254
retVal = i;
255+
}
254256
}
255257

256258
// If we didn't find the exact device name in our pre-built bus list, bail out.
257259
if( retVal == -1 )
260+
{
258261
throw new ArgumentException( );
262+
}
259263

260264
return retVal;
261265
}

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