Skip to content
This repository was archived by the owner on Jun 5, 2019. It is now read-only.

Commit 5a8a2cc

Browse files
smaillet-mssmaillet-ms
committed
Merge pull request #223 from smaillet-ms/Fix-ITM-VirtualPort
Fix itm virtual port on STM32F4xx
2 parents 18b912c + 6e476df commit 5a8a2cc

File tree

27 files changed

+579
-242
lines changed

27 files changed

+579
-242
lines changed

‎DeviceCode/Cores/arm/Processors/CortexMx/GlobalLock/dotNetMF.proj‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,10 +2,10 @@
22
<PropertyGroup>
33
<AssemblyName>GlobalLock_hal_Cortex</AssemblyName>
44
<ProjectGuid>{A839EEC5-C737-48C5-958B-BBF12920AA41}</ProjectGuid>
5-
<Description>Cortex-M3 Global lock</Description>
5+
<Description>Cortex-Mx Global lock</Description>
66
<Level>HAL</Level>
77
<LibraryFile>GlobalLock_hal_Cortex.$(LIB_EXT)</LibraryFile>
8-
<ProjectPath>$(SPOCLIENT)\DeviceCode\Cores\arm\Processors\CortexMx\dotNetMF.proj</ProjectPath>
8+
<ProjectPath>$(SPOCLIENT)\DeviceCode\Cores\arm\Processors\CortexMx\GlobalLock\dotNetMF.proj</ProjectPath>
99
<ManifestFile>GlobalLock_hal_Cortex.$(LIB_EXT).manifest</ManifestFile>
1010
<Documentation>
1111
</Documentation>

‎DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/ItmPort.cpp‎

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,49 @@
1+
#include <tinyhal.h>
2+
3+
#include "cmsis_generic.h"
4+
5+
// only one "generic" port supported for ITM tracing messages to hardware debugger
6+
// so pInstance is ignored
7+
static int ItmPort_Write( void* pInstance, const char* Data, size_t size )
8+
{
9+
for( int i = 0; i< size; ++i )
10+
ITM_SendChar( Data[i] );
11+
12+
return size;
13+
}
14+
15+
static IGenericPort const ItmPortItf =
16+
{
17+
// default returns TRUE
18+
NULL, //BOOL (*Initialize)( void* pInstance );
19+
20+
// default returns TRUE
21+
NULL, //BOOL (*Uninitialize)( void* pInstance );
22+
23+
// default return 0
24+
ItmPort_Write, //int (*Write)( void* pInstance, const char* Data, size_t size );
25+
26+
// defualt return 0
27+
NULL, //int (*Read)( void* pInstance, char* Data, size_t size );
28+
29+
// default return TRUE
30+
NULL, //BOOL (*Flush)( void* pInstance );
31+
32+
// default do nothing
33+
NULL, //void (*ProtectPins)( void* pInstance, BOOL On );
34+
35+
// default return FALSE
36+
NULL, //BOOL (*IsSslSupported)( void* pInstance );
37+
38+
// default return FALSE
39+
NULL, //BOOL (*UpgradeToSsl)( void* pInstance, const UINT8* pCACert, UINT32 caCertLen, const UINT8* pDeviceCert, UINT32 deviceCertLen, LPCSTR szTargetHost );
40+
41+
// default return FALSE
42+
NULL, //BOOL (*IsUsingSsl)( void* pInstance );
43+
};
44+
45+
extern const GenericPortTableEntry Itm0GenericPort =
46+
{
47+
ItmPortItf,
48+
NULL
49+
};

‎DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/dotNetMF.proj‎

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
<Project ToolsVersion="4.0" DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
2+
<PropertyGroup>
3+
<AssemblyName>CortexMx_ItmPort</AssemblyName>
4+
<ProjectGuid>{E30D2587-7481-4ECB-A961-16A8BA3DECB9}</ProjectGuid>
5+
<Description>Cortex-Mx Generic ITM port</Description>
6+
<Level>HAL</Level>
7+
<LibraryFile>CortexMx_ItmPort.$(LIB_EXT)</LibraryFile>
8+
<ProjectPath>$(SPOCLIENT)\DeviceCode\Cores\arm\Processors\CortexMx\ItmPort\dotNetMF.proj</ProjectPath>
9+
<ManifestFile>CortexMx_ItmPort.$(LIB_EXT).manifest</ManifestFile>
10+
<Documentation>
11+
</Documentation>
12+
<PlatformIndependent>False</PlatformIndependent>
13+
<Required>False</Required>
14+
<IgnoreDefaultLibPath>False</IgnoreDefaultLibPath>
15+
<IsStub>False</IsStub>
16+
<Directory>DeviceCode\Cores\arm\Processors\CortexMx</Directory>
17+
<OutputType>Library</OutputType>
18+
<PlatformIndependentBuild>false</PlatformIndependentBuild>
19+
<Version>4.0.0.0</Version>
20+
</PropertyGroup>
21+
<Import Project="$(SPOCLIENT)\tools\targets\Microsoft.SPOT.System.Settings" />
22+
<PropertyGroup />
23+
<ItemGroup>
24+
<Compile Include="ItmPort.cpp" />
25+
</ItemGroup>
26+
<Import Project="$(SPOCLIENT)\tools\targets\Microsoft.SPOT.System.Targets" />
27+
</Project>

‎DeviceCode/Cores/arm/Processors/CortexMx/cmsis_generic.h‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
#ifndef _CMSIS_GENERIC_H
2+
#define _CMSIS_GENERIC_H
3+
4+
#define __CMSIS_GENERIC /* disable implementation specific functions (i.e. NVIC and Systick ) */
5+
6+
#if defined (CORTEX_M7)
7+
#include "core_cm7.h"
8+
#elif defined (CORTEX_M4)
9+
#include "core_cm4.h"
10+
#elif defined (CORTEX_M3)
11+
#include "core_cm3.h"
12+
#elif defined (CORTEX_M0)
13+
#include "core_cm0.h"
14+
#elif defined (CORTEX_M0PLUS)
15+
#include "core_cm0plus.h"
16+
#else
17+
#error "Processor not specified or unsupported."
18+
#endif
19+
20+
#endif

‎DeviceCode/Initialization/tinyhal.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -382,9 +382,7 @@ void HAL_Initialize()
382382

383383
LCD_Initialize();
384384

385-
#if !defined(HAL_REDUCESIZE)
386385
CPU_InitializeCommunication();
387-
#endif
388386

389387
I2C_Initialize();
390388

‎DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip_OS/STM32F4_ETH_driver.cpp‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -228,7 +228,7 @@ void eth_resumeDmaReception()
228228
void eth_dmaInterruptHandler()
229229
{
230230
#if defined (_DEBUG) && DEBUG_DMA_INT
231-
debug_printf("DMA Int:");
231+
hal_printf("DMA Int:");
232232
#endif
233233

234234
// Normal interrupt summary
@@ -239,7 +239,7 @@ void eth_dmaInterruptHandler()
239239
{
240240
// Ethernet frame received
241241
#if defined (_DEBUG) && DEBUG_DMA_INT
242-
debug_printf(" RS");
242+
hal_printf(" RS");
243243
#endif
244244

245245
// Clear interrupt flag
@@ -257,7 +257,7 @@ void eth_dmaInterruptHandler()
257257
{
258258
// Ethernet frame sent
259259
#if defined (_DEBUG) && DEBUG_DMA_INT
260-
debug_printf(" TS");
260+
hal_printf(" TS");
261261
#endif
262262

263263
// Clear interrupt flag
@@ -269,7 +269,7 @@ void eth_dmaInterruptHandler()
269269
{
270270
// Transmit buffer unavailable
271271
#if defined (_DEBUG) && DEBUG_DMA_INT
272-
debug_printf(" TBUS");
272+
hal_printf(" TBUS");
273273
#endif
274274

275275
// Clear interrupt flag, transmition is resumed after descriptors have been prepared
@@ -281,7 +281,7 @@ void eth_dmaInterruptHandler()
281281
{
282282
// Early receive
283283
#if defined (_DEBUG) && DEBUG_DMA_INT
284-
debug_printf(" ERS");
284+
hal_printf(" ERS");
285285
#endif
286286

287287
// Clear interrupt flag. Also cleared automatically by RI
@@ -301,7 +301,7 @@ void eth_dmaInterruptHandler()
301301
{
302302
// Fatal bus error
303303
#if defined (_DEBUG) && DEBUG_DMA_INT
304-
debug_printf(" FBES");
304+
hal_printf(" FBES");
305305
#endif
306306

307307
// Clear interrupt flag
@@ -313,7 +313,7 @@ void eth_dmaInterruptHandler()
313313
{
314314
// Transmit process stopped
315315
#if defined (_DEBUG) && DEBUG_DMA_INT
316-
debug_printf(" TPSS");
316+
hal_printf(" TPSS");
317317
#endif
318318

319319
// Clear interrupt flag
@@ -325,7 +325,7 @@ void eth_dmaInterruptHandler()
325325
{
326326
// Transmit jabber timeout
327327
#if defined (_DEBUG) && DEBUG_DMA_INT
328-
debug_printf(" TJTS");
328+
hal_printf(" TJTS");
329329
#endif
330330

331331
// Clear interrupt flag
@@ -337,7 +337,7 @@ void eth_dmaInterruptHandler()
337337
{
338338
// Receive overflow
339339
#if defined (_DEBUG) && DEBUG_DMA_INT
340-
debug_printf(" ROS");
340+
hal_printf(" ROS");
341341
#endif
342342

343343
// Clear interrupt flag
@@ -349,7 +349,7 @@ void eth_dmaInterruptHandler()
349349
{
350350
// Transmit underflow
351351
#if defined (_DEBUG) && DEBUG_DMA_INT
352-
debug_printf(" TUS");
352+
hal_printf(" TUS");
353353
#endif
354354

355355
// Clear interrupt flag
@@ -361,7 +361,7 @@ void eth_dmaInterruptHandler()
361361
{
362362
// Receive buffer unavailable
363363
#if defined (_DEBUG) && DEBUG_DMA_INT
364-
debug_printf(" RBUS");
364+
hal_printf(" RBUS");
365365
#endif
366366

367367
// Clear interrupt flag
@@ -373,7 +373,7 @@ void eth_dmaInterruptHandler()
373373
{
374374
// Receive process stopped
375375
#if defined (_DEBUG) && DEBUG_DMA_INT
376-
debug_printf(" RPSS");
376+
hal_printf(" RPSS");
377377
#endif
378378

379379
// Clear interrupt flag
@@ -385,7 +385,7 @@ void eth_dmaInterruptHandler()
385385
{
386386
// Receive watchdog timeout
387387
#if defined (_DEBUG) && DEBUG_DMA_INT
388-
debug_printf(" RWTS");
388+
hal_printf(" RWTS");
389389
#endif
390390

391391
// Clear interrupt flag
@@ -397,7 +397,7 @@ void eth_dmaInterruptHandler()
397397
{
398398
// Early transmit interrupt
399399
#if defined (_DEBUG) && DEBUG_DMA_INT
400-
debug_printf(" ETS");
400+
hal_printf(" ETS");
401401
#endif
402402

403403
// Clear interrupt flag
@@ -410,7 +410,7 @@ void eth_dmaInterruptHandler()
410410
}
411411

412412
#if defined (_DEBUG) && DEBUG_DMA_INT
413-
debug_printf("\r\n");
413+
hal_printf("\r\n");
414414
#endif
415415
}
416416

‎DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip_OS/STM32F4_ETH_lwip.cpp‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ BOOL STM32F4_ETH_LWIP_open(Netif_t *const pNetif)
8888
if ( !initEthernet(pNetif) )
8989
{
9090
#ifdef _DEBUG_TRACE
91-
debug_printf("Ethernet driver cannot be opened\r\n");
91+
hal_printf("Ethernet driver cannot be opened\r\n");
9292
#endif
9393

9494
// Set flag as closed and abort
@@ -107,7 +107,7 @@ BOOL STM32F4_ETH_LWIP_open(Netif_t *const pNetif)
107107
s_isDriverOpened = TRUE;
108108

109109
#ifdef _DEBUG_TRACE
110-
debug_printf("Ethernet driver opened\r\n");
110+
hal_printf("Ethernet driver opened\r\n");
111111
#endif
112112

113113
return TRUE;
@@ -135,7 +135,7 @@ void STM32F4_ETH_LWIP_close(const BOOL disableClocks)
135135
}
136136

137137
#ifdef _DEBUG_TRACE
138-
debug_printf("Ethernet driver closed\r\n");
138+
hal_printf("Ethernet driver closed\r\n");
139139
#endif
140140
}
141141

@@ -177,7 +177,7 @@ static uint32_t processFrame(Netif_t *const pNetif)
177177
if (frameLength == 0)
178178
{
179179
#ifdef _DEBUG_TRACE
180-
debug_printf("%s: erroneous frame\r\n", __func__);
180+
hal_printf("%s: erroneous frame\r\n", __func__);
181181
#endif
182182

183183
return releaseRxDescUntilNextFrame();
@@ -188,7 +188,7 @@ static uint32_t processFrame(Netif_t *const pNetif)
188188
if (!pbuf)
189189
{
190190
#ifdef _DEBUG_TRACE
191-
debug_printf("%s: pbuf_alloc failed, discard current frame\r\n", __func__);
191+
hal_printf("%s: pbuf_alloc failed, discard current frame\r\n", __func__);
192192
#endif
193193

194194
return releaseFrame();
@@ -218,7 +218,7 @@ static uint32_t copyFrameToPbuf(Pbuf_t *pbuf)
218218
while (!eth_isRxDescOwnedByDma() && !isLastDescProcessed)
219219
{
220220
#if DEBUG_RX_DESC
221-
debug_printf("----- Before processing RX -----\r\n");
221+
hal_printf("----- Before processing RX -----\r\n");
222222
eth_displayRxDescStatus();
223223
#endif
224224

@@ -237,7 +237,7 @@ static uint32_t copyFrameToPbuf(Pbuf_t *pbuf)
237237
nRxDesc++;
238238

239239
#if DEBUG_RX_DESC
240-
debug_printf("----- After processing RX -----\r\n");
240+
hal_printf("----- After processing RX -----\r\n");
241241
eth_displayRxDescStatus();
242242
#endif
243243
}
@@ -400,7 +400,7 @@ static BOOL waitForTxDescriptor(uint32_t timeout)
400400
if (nWait == timeout)
401401
{
402402
//#ifdef _DEBUG
403-
//debug_printf("%s: TX descriptor owned by DMA\r\n", __func__);
403+
//hal_printf("%s: TX descriptor owned by DMA\r\n", __func__);
404404
//#endif
405405

406406
return FALSE;
@@ -426,7 +426,7 @@ static BOOL copyFrameFromPbuf(const Pbuf_t *pbuf)
426426
if (frameLength > TX_BUFFER_LENGTH)
427427
{
428428
#ifdef _DEBUG_TRACE
429-
debug_printf("%s: Frame larger than TX buffer (%d)\r\n", __func__, frameLength);
429+
hal_printf("%s: Frame larger than TX buffer (%d)\r\n", __func__, frameLength);
430430
#endif
431431

432432
return FALSE;

‎DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip_OS/STM32F4_ETH_phy.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ static void findPhyAddr()
5555
if ((value == PHY_KENDIN_OUI_ID1) || (value == PHY_ST802RT1X_OUI_ID1))
5656
{
5757
rc = phyAddress;
58-
debug_printf( "Valid PHY Found: %x (%x)\r\n", rc, value);
58+
hal_printf( "Valid PHY Found: %x (%x)\r\n", rc, value);
5959
g_foundPhyAddress = TRUE;
6060
g_phyAddress = phyAddress;
6161

@@ -189,7 +189,7 @@ EthMode eth_enableAutoNegotiation()
189189
return ETHMODE_FAIL;
190190

191191
#if (DEBUG_TRACE)
192-
debug_printf("PHY CR status 0x%x \n",status);
192+
hal_printf("PHY CR status 0x%x \n",status);
193193
#endif
194194

195195
// Start Auto Negotiation
@@ -210,13 +210,13 @@ EthMode eth_enableAutoNegotiation()
210210
// Check auto negotiation completed
211211
if ((status & PHY_SR_ANEGC) != PHY_SR_ANEGC)
212212
{
213-
debug_printf("autonegotiate failed. Status: %x\n", status);
213+
hal_printf("autonegotiate failed. Status: %x\n", status);
214214
return ETHMODE_FAIL;
215215

216216
}
217217

218218
#if (DEBUG_TRACE)
219-
debug_printf("Autonegotiate Complete SR:%x\n", status);
219+
hal_printf("Autonegotiate Complete SR:%x\n", status);
220220
#endif
221221

222222
#if STM32F4_ETH_PHY_MII

‎DeviceCode/Targets/Native/STM32F4/DeviceCode/STM32F4_ETH_lwip_OS/STM32F4_ETH_rx_desc.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ void eth_initRxDescriptors()
122122
}
123123

124124
#if DEBUG_RX_DESC
125-
debug_printf("----- After init RX desc -----\r\n");
125+
hal_printf("----- After init RX desc -----\r\n");
126126
eth_displayRxDescStatus();
127127
#endif
128128

@@ -282,7 +282,7 @@ void eth_displayRxDescStatus()
282282

283283
for (uint32_t i = 0; i < N_RX_DESC; i++)
284284
{
285-
debug_printf("%d: 0x%08x %s\r\n", i, s_rxDescriptor[i].rdes0,
285+
hal_printf("%d: 0x%08x %s\r\n", i, s_rxDescriptor[i].rdes0,
286286
s_pRxDesc == &s_rxDescriptor[i] ? "<===" : "");
287287
}
288288
}

0 commit comments

Comments
 (0)