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correct the L2 sector cache bypassbit merging(or merging) and parse misprediction rate for each hashPC
1 parent c2f7bec commit c060044

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3 files changed

+26
-12
lines changed

3 files changed

+26
-12
lines changed

src/gpgpu-sim/gpu-cache.cc

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -643,13 +643,13 @@ void tag_array::fill(new_addr_type addr, unsigned time, mem_fetch *mf, //on-fill
643643
uint8_t *l1d_prediction_table,uint8_t hashed_pc //cwpeng
644644
) {
645645
fill(addr, time, mf->get_access_sector_mask(), mf->get_access_byte_mask(),
646-
is_write, l1d_prediction_table, hashed_pc, mf->get_bypassBit());
646+
is_write, l1d_prediction_table, hashed_pc, mf->get_bypassBit(), mf); // cwpeng mf for print PC
647647
}
648648

649649
void tag_array::fill(new_addr_type addr, unsigned time, //on-fill
650650
mem_access_sector_mask_t mask,
651651
mem_access_byte_mask_t byte_mask, bool is_write,
652-
uint8_t *l1d_prediction_table,uint8_t hashed_pc, bool bypassBit
652+
uint8_t *l1d_prediction_table,uint8_t hashed_pc, bool bypassBit, mem_fetch *mf
653653
) {
654654
// assert( m_config.m_alloc_policy == ON_FILL );
655655
unsigned idx;
@@ -675,13 +675,17 @@ void tag_array::fill(new_addr_type addr, unsigned time, //on-fill
675675
}
676676
if(isBypassed){
677677
if(bypassBit){
678-
// printf("L2 indicate misprediction, bypassbit = 1\n") ;
678+
printf("L2 indicate misprediction, bypassbit = 1, PC=%llx\n", mf->get_pc()); ;
679679
// l1d_prediction_table[hashed_pc] = threshold-1 ;
680680
isBypassed = false ; // if L2 indicates misprediction, do not bypass
681+
l1_cache::inst_stats[hashed_pc].misprediction_time++ ;
682+
}
683+
else{
684+
l1_cache::inst_stats[hashed_pc].no_misprediction_time++ ;
681685
}
682686
}
683687

684-
// isBypassed = false ;
688+
// isBypassed = false ; // For testing without bypass
685689

686690

687691
if(l1d_prediction_table[m_lines[idx]->m_hashed_pc] < 15 && victim_valid && isBypassed==false) //&& m_tag_array->get_hashed_pc_from_tag(addr)->is_valid_line()) // AISH Saturating counter stays at 15
@@ -1587,6 +1591,7 @@ void baseline_cache::fill(mem_fetch *mf, unsigned time, uint8_t *l1d_prediction_
15871591

15881592
if (e->second.pending_read > 0) {
15891593
// wait for the other requests to come back
1594+
// printf("pending_read=%d\n", e->second.pending_read);
15901595
delete mf;
15911596
return;
15921597
} else {
@@ -2645,16 +2650,17 @@ void l1_cache::print_prediction_table(FILE *fp, unsigned core_id) const {
26452650
}
26462651

26472652
void l1_cache::print_ldst_inst_stats(FILE *fp){
2648-
fprintf(fp, "L1D Prediction Table State:\n");
2653+
fprintf(fp, "L1D Prediction Table Stats:\n");
26492654
for(unsigned i = 0; i < 256; i++){
2650-
fprintf(fp, "HashPC:%3d: access time %8d, hit_rate:%1.5f, L2 access time:%7d, bypass_rate:%1.5f, occupy_l1_count:%8d, reuse_rate:%1.5f\n",
2655+
fprintf(fp, "HashPC:%3d: access time %8d, hit_rate:%1.5f, L2 access time:%7d, bypass_rate:%1.5f, occupy_l1_count:%8d, reuse_rate:%1.5f, mispredict_rate:%1.5f\n",
26512656
i,
26522657
inst_stats[i].access_time,
26532658
inst_stats[i].get_hit_rate(),
26542659
inst_stats[i].get_l2_access_time(),
26552660
inst_stats[i].get_bypass_rate(),
26562661
inst_stats[i].no_reuse_time + inst_stats[i].reuse_time,
2657-
inst_stats[i].get_reuse_rate()
2662+
inst_stats[i].get_reuse_rate(),
2663+
inst_stats[i].get_misprediction_rate()
26582664
);
26592665
}
26602666
fprintf(fp, "========================================================================\n");

src/gpgpu-sim/gpu-cache.h

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -988,7 +988,7 @@ class tag_array {
988988
void fill(new_addr_type addr, unsigned time, mem_access_sector_mask_t mask,
989989
mem_access_byte_mask_t byte_mask, bool is_write);
990990
void fill(new_addr_type addr, unsigned time, mem_access_sector_mask_t mask,
991-
mem_access_byte_mask_t byte_mask, bool is_write, uint8_t *l1d_prediction_table,uint8_t hashed_pc, bool bypassBit); // cwpeng
991+
mem_access_byte_mask_t byte_mask, bool is_write, uint8_t *l1d_prediction_table,uint8_t hashed_pc, bool bypassBit, mem_fetch *mf); // cwpeng
992992

993993
unsigned size() const { return m_config.get_num_lines(); }
994994
cache_block_t *get_block(unsigned idx) { return m_lines[idx]; }
@@ -1782,6 +1782,8 @@ class ldst_inst_stats{ // cwpeng
17821782
uint64_t not_bypass_time ;
17831783
uint64_t reuse_time ;
17841784
uint64_t no_reuse_time ;
1785+
uint64_t misprediction_time ;
1786+
uint64_t no_misprediction_time ;
17851787

17861788
double get_hit_rate(){
17871789
if(hit_time+miss_time==0) return 0.0 ;
@@ -1801,6 +1803,11 @@ class ldst_inst_stats{ // cwpeng
18011803
if(reuse_time+no_reuse_time==0) return 0.0 ;
18021804
return (double)reuse_time/(double)(reuse_time+no_reuse_time) ;
18031805
}
1806+
1807+
double get_misprediction_rate(){
1808+
if(misprediction_time+no_misprediction_time==0) return 0.0 ;
1809+
return (double)misprediction_time/(double)(misprediction_time+no_misprediction_time) ;
1810+
}
18041811
} ;
18051812

18061813
/// This is meant to model the first level data cache in Fermi.

src/gpgpu-sim/l2cache.cc

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -546,9 +546,10 @@ void memory_sub_partition::cache_cycle(unsigned cycle) {
546546
bool isBypassed = mf->get_isBypassed();
547547
bool bypassBit = m_L2cache->get_bypass_bit_from_l2(mf->get_addr(), mf); // Read existing bypass bit from L2
548548
mf->set_bypassBit(bypassBit); // Set the bypass bit in mf to be sent back to L1
549-
// if(bypassBit){
550-
// m_L2cache->set_bypass_bit_from_l2(mf->get_addr(), mf, false);
551-
// }
549+
if(bypassBit){
550+
// m_L2cache->set_bypass_bit_from_l2(mf->get_addr(), mf, false);
551+
mf->get_original_mf()->set_bypassBit(true); // Also set the bypass bit in original mf to be sent back to L1
552+
}
552553
// else{
553554
// m_L2cache->set_bypass_bit_from_l2(mf->get_addr(), mf, isBypassed);
554555
// }
@@ -729,7 +730,7 @@ bool memory_sub_partition::busy() const { return !m_request_tracker.empty(); }
729730

730731
std::vector<mem_fetch *>
731732
memory_sub_partition::breakdown_request_to_sector_requests(mem_fetch *mf) {
732-
// printf("L2 access data size: %d, from L1? %b\n", mf->get_data_size(), mf->get_L1toL2());
733+
// printf("L2 access data size: %d, from L1? %b, PC:%llx\n", mf->get_data_size(), mf->get_L1toL2(), mf->get_pc());
733734
std::vector<mem_fetch *> result;
734735
mem_access_sector_mask_t sector_mask = mf->get_access_sector_mask();
735736
if (mf->get_data_size() == SECTOR_SIZE &&

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