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[None][ci] Disable tensorRT cases in post-merge (#8028)
Signed-off-by: Hui Gao <[email protected]>
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‎jenkins/L0_Test.groovy‎

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -2084,53 +2084,53 @@ def launchTestJobs(pipeline, testFilter)
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// Currently post-merge test stages only run tests with "stage: post_merge" mako
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// in the test-db. This behavior may change in the future.
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"A10-PyTorch-Post-Merge-1": ["a10", "l0_a10", 1, 1],
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"A10-TensorRT-Post-Merge-1": ["a10", "l0_a10", 1, 2],
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"A10-TensorRT-Post-Merge-2": ["a10", "l0_a10", 2, 2],
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// "A10-TensorRT-Post-Merge-1": ["a10", "l0_a10", 1, 2],
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// "A10-TensorRT-Post-Merge-2": ["a10", "l0_a10", 2, 2],
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"A10-FMHA-Post-Merge-1": ["a10", "l0_a10", 1, 1],
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"A30-TensorRT-Post-Merge-1": ["a30", "l0_a30", 1, 6],
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"A30-TensorRT-Post-Merge-2": ["a30", "l0_a30", 2, 6],
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"A30-TensorRT-Post-Merge-3": ["a30", "l0_a30", 3, 6],
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"A30-TensorRT-Post-Merge-4": ["a30", "l0_a30", 4, 6],
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"A30-TensorRT-Post-Merge-5": ["a30", "l0_a30", 5, 6],
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"A30-TensorRT-Post-Merge-6": ["a30", "l0_a30", 6, 6],
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// "A30-TensorRT-Post-Merge-1": ["a30", "l0_a30", 1, 6],
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// "A30-TensorRT-Post-Merge-2": ["a30", "l0_a30", 2, 6],
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// "A30-TensorRT-Post-Merge-3": ["a30", "l0_a30", 3, 6],
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// "A30-TensorRT-Post-Merge-4": ["a30", "l0_a30", 4, 6],
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// "A30-TensorRT-Post-Merge-5": ["a30", "l0_a30", 5, 6],
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// "A30-TensorRT-Post-Merge-6": ["a30", "l0_a30", 6, 6],
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"A30-CPP-Post-Merge-1": ["a30", "l0_a30", 1, 1],
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"A30-Triton-Post-Merge-1": ["a30", "l0_a30", 1, 2],
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"A30-Triton-Post-Merge-2": ["a30", "l0_a30", 2, 2],
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"A100X-TensorRT-Post-Merge-1": ["a100x", "l0_a100", 1, 6],
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"A100X-TensorRT-Post-Merge-2": ["a100x", "l0_a100", 2, 6],
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"A100X-TensorRT-Post-Merge-3": ["a100x", "l0_a100", 3, 6],
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"A100X-TensorRT-Post-Merge-4": ["a100x", "l0_a100", 4, 6],
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"A100X-TensorRT-Post-Merge-5": ["a100x", "l0_a100", 5, 6],
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"A100X-TensorRT-Post-Merge-6": ["a100x", "l0_a100", 6, 6],
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// "A100X-TensorRT-Post-Merge-1": ["a100x", "l0_a100", 1, 6],
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// "A100X-TensorRT-Post-Merge-2": ["a100x", "l0_a100", 2, 6],
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// "A100X-TensorRT-Post-Merge-3": ["a100x", "l0_a100", 3, 6],
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// "A100X-TensorRT-Post-Merge-4": ["a100x", "l0_a100", 4, 6],
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// "A100X-TensorRT-Post-Merge-5": ["a100x", "l0_a100", 5, 6],
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// "A100X-TensorRT-Post-Merge-6": ["a100x", "l0_a100", 6, 6],
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"A100X-Triton-Post-Merge-1": ["a100x", "l0_a100", 1, 2],
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"A100X-Triton-Post-Merge-2": ["a100x", "l0_a100", 2, 2],
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"A100X-FMHA-Post-Merge-1": ["a100x", "l0_a100", 1, 1],
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"L40S-TensorRT-Post-Merge-1": ["l40s", "l0_l40s", 1, 5],
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"L40S-TensorRT-Post-Merge-2": ["l40s", "l0_l40s", 2, 5],
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"L40S-TensorRT-Post-Merge-3": ["l40s", "l0_l40s", 3, 5],
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"L40S-TensorRT-Post-Merge-4": ["l40s", "l0_l40s", 4, 5],
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"L40S-TensorRT-Post-Merge-5": ["l40s", "l0_l40s", 5, 5],
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// "L40S-TensorRT-Post-Merge-1": ["l40s", "l0_l40s", 1, 5],
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// "L40S-TensorRT-Post-Merge-2": ["l40s", "l0_l40s", 2, 5],
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// "L40S-TensorRT-Post-Merge-3": ["l40s", "l0_l40s", 3, 5],
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// "L40S-TensorRT-Post-Merge-4": ["l40s", "l0_l40s", 4, 5],
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// "L40S-TensorRT-Post-Merge-5": ["l40s", "l0_l40s", 5, 5],
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"L40S-FMHA-Post-Merge-1": ["l40s", "l0_l40s", 1, 1],
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"H100_PCIe-PyTorch-Post-Merge-1": ["h100-cr", "l0_h100", 1, 1],
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"H100_PCIe-CPP-Post-Merge-1": ["h100-cr", "l0_h100", 1, 1],
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"H100_PCIe-TensorRT-Post-Merge-1": ["h100-cr", "l0_h100", 1, 5],
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"H100_PCIe-TensorRT-Post-Merge-2": ["h100-cr", "l0_h100", 2, 5],
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"H100_PCIe-TensorRT-Post-Merge-3": ["h100-cr", "l0_h100", 3, 5],
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"H100_PCIe-TensorRT-Post-Merge-4": ["h100-cr", "l0_h100", 4, 5],
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"H100_PCIe-TensorRT-Post-Merge-5": ["h100-cr", "l0_h100", 5, 5],
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// "H100_PCIe-TensorRT-Post-Merge-1": ["h100-cr", "l0_h100", 1, 5],
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// "H100_PCIe-TensorRT-Post-Merge-2": ["h100-cr", "l0_h100", 2, 5],
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// "H100_PCIe-TensorRT-Post-Merge-3": ["h100-cr", "l0_h100", 3, 5],
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// "H100_PCIe-TensorRT-Post-Merge-4": ["h100-cr", "l0_h100", 4, 5],
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// "H100_PCIe-TensorRT-Post-Merge-5": ["h100-cr", "l0_h100", 5, 5],
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"H100_PCIe-FMHA-Post-Merge-1": ["h100-cr", "l0_h100", 1, 1],
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"B200_PCIe-Triton-Post-Merge-1": ["b100-ts2", "l0_b200", 1, 1],
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"B200_PCIe-PyTorch-Post-Merge-1": ["b100-ts2", "l0_b200", 1, 1],
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"B200_PCIe-TensorRT-Post-Merge-1": ["b100-ts2", "l0_b200", 1, 2],
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"B200_PCIe-TensorRT-Post-Merge-2": ["b100-ts2", "l0_b200", 2, 2],
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// "B200_PCIe-TensorRT-Post-Merge-1": ["b100-ts2", "l0_b200", 1, 2],
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// "B200_PCIe-TensorRT-Post-Merge-2": ["b100-ts2", "l0_b200", 2, 2],
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"H100_PCIe-TensorRT-Perf-1": ["h100-cr", "l0_perf", 1, 1],
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"H100_PCIe-PyTorch-Perf-1": ["h100-cr", "l0_perf", 1, 1],
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"DGX_H200-4_GPUs-Triton-Post-Merge-1": ["dgx-h200-x4", "l0_dgx_h200", 1, 1, 4],
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"DGX_H200-8_GPUs-PyTorch-Post-Merge-1": ["dgx-h200-x8", "l0_dgx_h200", 1, 1, 8],
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"DGX_H200-4_GPUs-PyTorch-Post-Merge-1": ["dgx-h200-x4", "l0_dgx_h200", 1, 1, 4],
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"DGX_H200-4_GPUs-TensorRT-Post-Merge-1": ["dgx-h200-x4", "l0_dgx_h200", 1, 3, 4],
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"DGX_H200-4_GPUs-TensorRT-Post-Merge-2": ["dgx-h200-x4", "l0_dgx_h200", 2, 3, 4],
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"DGX_H200-4_GPUs-TensorRT-Post-Merge-3": ["dgx-h200-x4", "l0_dgx_h200", 3, 3, 4],
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// "DGX_H200-4_GPUs-TensorRT-Post-Merge-1": ["dgx-h200-x4", "l0_dgx_h200", 1, 3, 4],
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// "DGX_H200-4_GPUs-TensorRT-Post-Merge-2": ["dgx-h200-x4", "l0_dgx_h200", 2, 3, 4],
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// "DGX_H200-4_GPUs-TensorRT-Post-Merge-3": ["dgx-h200-x4", "l0_dgx_h200", 3, 3, 4],
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"RTXPro6000-PyTorch-Post-Merge-1": ["rtx-pro-6000", "l0_rtx_pro_6000", 1, 1],
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"RTXPro6000-4_GPUs-PyTorch-Post-Merge-1": ["rtx-pro-6000-x4", "l0_rtx_pro_6000", 1, 2, 4],
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"RTXPro6000-4_GPUs-PyTorch-Post-Merge-2": ["rtx-pro-6000-x4", "l0_rtx_pro_6000", 2, 2, 4],

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