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‎CHANGELOG.md‎

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Original file line numberDiff line numberDiff line change
@@ -2,6 +2,12 @@
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## Release 550 Entries
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### [550.54.14] 2024-02-23
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#### Added
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- Added vGPU Host and vGPU Guest support. For vGPU Host, please refer to the README.vgpu packaged in the vGPU Host Package for more details.
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### [550.40.07] 2024-01-24
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#### Fixed

‎README.md‎

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# NVIDIA Linux Open GPU Kernel Module Source
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This is the source release of the NVIDIA Linux open GPU kernel modules,
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version 550.40.07.
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version 550.54.14.
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## How to Build
@@ -17,7 +17,7 @@ as root:
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Note that the kernel modules built here must be used with GSP
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firmware and user-space NVIDIA GPU driver components from a corresponding
20-
550.40.07 driver release. This can be achieved by installing
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550.54.14 driver release. This can be achieved by installing
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the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
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option. E.g.,
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@@ -188,7 +188,10 @@ encountered specific to them.
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For details on feature support and limitations, see the NVIDIA GPU driver
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end user README here:
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191-
https://us.download.nvidia.com/XFree86/Linux-x86_64/550.40.07/README/kernel_open.html
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https://us.download.nvidia.com/XFree86/Linux-x86_64/550.54.14/README/kernel_open.html
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For vGPU support, please refer to the README.vgpu packaged in the vGPU Host
194+
Package for more details.
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In the below table, if three IDs are listed, the first is the PCI Device
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ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI
@@ -650,7 +653,9 @@ Subsystem Device ID.
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| NVIDIA T400 4GB | 1FF2 103C 1613 |
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| NVIDIA T400 4GB | 1FF2 103C 8A80 |
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| NVIDIA T400 4GB | 1FF2 10DE 1613 |
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| NVIDIA T400E | 1FF2 10DE 18FF |
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| NVIDIA T400 4GB | 1FF2 17AA 1613 |
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| NVIDIA T400E | 1FF2 17AA 18FF |
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| Quadro T1000 | 1FF9 |
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| NVIDIA A100-SXM4-40GB | 20B0 |
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| NVIDIA A100-PG509-200 | 20B0 10DE 1450 |
@@ -746,12 +751,15 @@ Subsystem Device ID.
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| NVIDIA H800 PCIe | 2322 10DE 17A4 |
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| NVIDIA H800 | 2324 10DE 17A6 |
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| NVIDIA H800 | 2324 10DE 17A8 |
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| NVIDIA H20 | 2329 10DE 198B |
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| NVIDIA H20 | 2329 10DE 198C |
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| NVIDIA H100 80GB HBM3 | 2330 10DE 16C0 |
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| NVIDIA H100 80GB HBM3 | 2330 10DE 16C1 |
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| NVIDIA H100 PCIe | 2331 10DE 1626 |
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| NVIDIA H100 | 2339 10DE 17FC |
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| NVIDIA H800 NVL | 233A 10DE 183A |
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| NVIDIA GH200 120GB | 2342 10DE 16EB |
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| NVIDIA GH200 120GB | 2342 10DE 1805 |
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| NVIDIA GH200 480GB | 2342 10DE 1809 |
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| NVIDIA GeForce RTX 3060 Ti | 2414 |
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| NVIDIA GeForce RTX 3080 Ti Laptop GPU | 2420 |
@@ -805,6 +813,7 @@ Subsystem Device ID.
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| NVIDIA RTX A2000 12GB | 2571 10DE 1611 |
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| NVIDIA RTX A2000 12GB | 2571 17AA 1611 |
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| NVIDIA GeForce RTX 3050 | 2582 |
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| NVIDIA GeForce RTX 3050 | 2584 |
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| NVIDIA GeForce RTX 3050 Ti Laptop GPU | 25A0 |
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| NVIDIA GeForce RTX 3050Ti Laptop GPU | 25A0 103C 8928 |
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| NVIDIA GeForce RTX 3050Ti Laptop GPU | 25A0 103C 89F9 |
@@ -846,6 +855,7 @@ Subsystem Device ID.
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| NVIDIA RTX 5000 Ada Generation | 26B2 103C 17FA |
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| NVIDIA RTX 5000 Ada Generation | 26B2 10DE 17FA |
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| NVIDIA RTX 5000 Ada Generation | 26B2 17AA 17FA |
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| NVIDIA RTX 5880 Ada Generation | 26B3 1028 1934 |
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| NVIDIA RTX 5880 Ada Generation | 26B3 103C 1934 |
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| NVIDIA RTX 5880 Ada Generation | 26B3 10DE 1934 |
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| NVIDIA RTX 5880 Ada Generation | 26B3 17AA 1934 |
@@ -854,6 +864,7 @@ Subsystem Device ID.
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| NVIDIA L40S | 26B9 10DE 1851 |
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| NVIDIA L40S | 26B9 10DE 18CF |
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| NVIDIA L20 | 26BA 10DE 1957 |
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| NVIDIA GeForce RTX 4080 SUPER | 2702 |
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| NVIDIA GeForce RTX 4080 | 2704 |
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| NVIDIA GeForce RTX 4070 Ti SUPER | 2705 |
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| NVIDIA GeForce RTX 4090 Laptop GPU | 2717 |
@@ -891,6 +902,10 @@ Subsystem Device ID.
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| NVIDIA GeForce RTX 4060 | 2882 |
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| NVIDIA GeForce RTX 4060 Laptop GPU | 28A0 |
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| NVIDIA GeForce RTX 4050 Laptop GPU | 28A1 |
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| NVIDIA RTX 2000 Ada Generation | 28B0 1028 1870 |
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| NVIDIA RTX 2000 Ada Generation | 28B0 103C 1870 |
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| NVIDIA RTX 2000 Ada Generation | 28B0 10DE 1870 |
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| NVIDIA RTX 2000 Ada Generation | 28B0 17AA 1870 |
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| NVIDIA RTX 2000 Ada Generation Laptop GPU | 28B8 |
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| NVIDIA GeForce RTX 4060 Laptop GPU | 28E0 |
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| NVIDIA GeForce RTX 4050 Laptop GPU | 28E1 |

‎kernel-open/Kbuild‎

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@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
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EXTRA_CFLAGS += -I$(src)
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EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
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EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
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EXTRA_CFLAGS += -DNV_VERSION_STRING=\"550.40.07\"
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EXTRA_CFLAGS += -DNV_VERSION_STRING=\"550.54.14\"
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ifneq ($(SYSSRCHOST1X),)
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EXTRA_CFLAGS += -I$(SYSSRCHOST1X)

‎kernel-open/common/inc/nv.h‎

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@@ -621,6 +621,14 @@ typedef enum
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#define NV_IS_DEVICE_IN_SURPRISE_REMOVAL(nv) \
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(((nv)->flags & NV_FLAG_IN_SURPRISE_REMOVAL) != 0)
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624+
/*
625+
* For console setup by EFI GOP, the base address is BAR1.
626+
* For console setup by VBIOS, the base address is BAR2 + 16MB.
627+
*/
628+
#define NV_IS_CONSOLE_MAPPED(nv, addr) \
629+
(((addr) == (nv)->bars[NV_GPU_BAR_INDEX_FB].cpu_address) || \
630+
((addr) == ((nv)->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address + 0x1000000)))
631+
624632
#define NV_SOC_IS_ISO_IOMMU_PRESENT(nv) \
625633
((nv)->iommus.iso_iommu_present)
626634

@@ -878,6 +886,8 @@ NvBool NV_API_CALL nv_match_gpu_os_info(nv_state_t *, void *);
878886
NvU32 NV_API_CALL nv_get_os_type(void);
879887

880888
void NV_API_CALL nv_get_updated_emu_seg(NvU32 *start, NvU32 *end);
889+
void NV_API_CALL nv_get_screen_info(nv_state_t *, NvU64 *, NvU32 *, NvU32 *, NvU32 *, NvU32 *, NvU64 *);
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881891
struct dma_buf;
882892
typedef struct nv_dma_buf nv_dma_buf_t;
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struct drm_gem_object;

‎kernel-open/common/inc/nv_uvm_interface.h‎

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@@ -956,12 +956,20 @@ NV_STATUS nvUvmInterfaceGetNonReplayableFaults(UvmGpuFaultInfo *pFaultInfo,
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- This function should not be called when interrupts are disabled.
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958958
Arguments:
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device[IN] - Device handle associated with the gpu
959+
pFaultInfo[IN] - information provided by RM for fault handling.
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used for obtaining the device handle without locks.
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bCopyAndFlush[IN] - Instructs RM to perform the flush in the Copy+Flush mode.
962+
In this mode, RM will perform a copy of the packets from
963+
the HW buffer to UVM's SW buffer as part of performing
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the flush. This mode gives UVM the opportunity to observe
965+
the packets contained within the HW buffer at the time
966+
of issuing the call.
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Error codes:
962969
NV_ERR_INVALID_ARGUMENT
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*/
964-
NV_STATUS nvUvmInterfaceFlushReplayableFaultBuffer(uvmGpuDeviceHandle device);
971+
NV_STATUS nvUvmInterfaceFlushReplayableFaultBuffer(UvmGpuFaultInfo *pFaultInfo,
972+
NvBool bCopyAndFlush);
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966974
/*******************************************************************************
967975
nvUvmInterfaceTogglePrefetchFaults
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982990
Error codes:
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NV_ERR_INVALID_ARGUMENT
984992
*/
985-
NV_STATUS nvUvmInterfaceTogglePrefetchFaults(UvmGpuFaultInfo *pFaultInfo, NvBool bEnable);
993+
NV_STATUS nvUvmInterfaceTogglePrefetchFaults(UvmGpuFaultInfo *pFaultInfo,
994+
NvBool bEnable);
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987996
/*******************************************************************************
988997
nvUvmInterfaceInitAccessCntrInfo

‎kernel-open/common/inc/nv_uvm_types.h‎

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@@ -700,8 +700,10 @@ typedef struct UvmGpuInfo_tag
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// local EGM properties
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// NV_TRUE if EGM is enabled
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NvBool egmEnabled;
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703704
// Peer ID to reach local EGM when EGM is enabled
704705
NvU8 egmPeerId;
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// EGM base address to offset in the GMMU PTE entry for EGM mappings
706708
NvU64 egmBaseAddr;
707709
} UvmGpuInfo;
@@ -712,9 +714,10 @@ typedef struct UvmGpuFbInfo_tag
712714
// RM regions that are not registered with PMA either.
713715
NvU64 maxAllocatableAddress;
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715-
NvU32 heapSize; // RAM in KB available for user allocations
716-
NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation
717-
NvBool bZeroFb; // Zero FB mode enabled.
717+
NvU32 heapSize; // RAM in KB available for user allocations
718+
NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation
719+
NvBool bZeroFb; // Zero FB mode enabled.
720+
NvU64 maxVidmemPageSize; // Largest GPU page size to access vidmem.
718721
} UvmGpuFbInfo;
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720723
typedef struct UvmGpuEccInfo_tag

‎kernel-open/common/inc/os-interface.h‎

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/*
2-
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
33
* SPDX-License-Identifier: MIT
44
*
55
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -160,10 +160,9 @@ NvBool NV_API_CALL os_is_vgx_hyper (void);
160160
NV_STATUS NV_API_CALL os_inject_vgx_msi (NvU16, NvU64, NvU32);
161161
NvBool NV_API_CALL os_is_grid_supported (void);
162162
NvU32 NV_API_CALL os_get_grid_csp_support (void);
163-
void NV_API_CALL os_get_screen_info (NvU64 *, NvU32 *, NvU32 *, NvU32 *, NvU32 *, NvU64, NvU64);
164163
void NV_API_CALL os_bug_check (NvU32, const char *);
165164
NV_STATUS NV_API_CALL os_lock_user_pages (void *, NvU64, void **, NvU32);
166-
NV_STATUS NV_API_CALL os_lookup_user_io_memory (void *, NvU64, NvU64 **, void**);
165+
NV_STATUS NV_API_CALL os_lookup_user_io_memory (void *, NvU64, NvU64 **);
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NV_STATUS NV_API_CALL os_unlock_user_pages (NvU64, void *);
168167
NV_STATUS NV_API_CALL os_match_mmap_offset (void *, NvU64, NvU64 *);
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NV_STATUS NV_API_CALL os_get_euid (NvU32 *);
@@ -198,6 +197,8 @@ nv_cap_t* NV_API_CALL os_nv_cap_create_file_entry (nv_cap_t *, const char *,
198197
void NV_API_CALL os_nv_cap_destroy_entry (nv_cap_t *);
199198
int NV_API_CALL os_nv_cap_validate_and_dup_fd(const nv_cap_t *, int);
200199
void NV_API_CALL os_nv_cap_close_fd (int);
200+
NvS32 NV_API_CALL os_imex_channel_get (NvU64);
201+
NvS32 NV_API_CALL os_imex_channel_count (void);
201202

202203
enum os_pci_req_atomics_type {
203204
OS_INTF_PCIE_REQ_ATOMICS_32BIT,
@@ -219,6 +220,7 @@ extern NvU8 os_page_shift;
219220
extern NvBool os_cc_enabled;
220221
extern NvBool os_cc_tdx_enabled;
221222
extern NvBool os_dma_buf_enabled;
223+
extern NvBool os_imex_channel_is_supported;
222224

223225
/*
224226
* ---------------------------------------------------------------------------

‎kernel-open/common/inc/rm-gpu-ops.h‎

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Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ NV_STATUS NV_API_CALL rm_gpu_ops_own_page_fault_intr(nvidia_stack_t *, nvgpuDevi
7575
NV_STATUS NV_API_CALL rm_gpu_ops_init_fault_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuFaultInfo_t);
7676
NV_STATUS NV_API_CALL rm_gpu_ops_destroy_fault_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuFaultInfo_t);
7777
NV_STATUS NV_API_CALL rm_gpu_ops_get_non_replayable_faults(nvidia_stack_t *, nvgpuFaultInfo_t, void *, NvU32 *);
78-
NV_STATUS NV_API_CALL rm_gpu_ops_flush_replayable_fault_buffer(nvidia_stack_t *, nvgpuDeviceHandle_t);
78+
NV_STATUS NV_API_CALL rm_gpu_ops_flush_replayable_fault_buffer(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool);
7979
NV_STATUS NV_API_CALL rm_gpu_ops_toggle_prefetch_faults(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool);
8080
NV_STATUS NV_API_CALL rm_gpu_ops_has_pending_non_replayable_faults(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool *);
8181
NV_STATUS NV_API_CALL rm_gpu_ops_init_access_cntr_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t, NvU32);

‎kernel-open/header-presence-tests.mk‎

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@@ -96,5 +96,6 @@ NV_HEADER_PRESENCE_TESTS = \
9696
soc/tegra/bpmp.h \
9797
linux/sync_file.h \
9898
linux/cc_platform.h \
99-
asm/cpufeature.h
99+
asm/cpufeature.h \
100+
linux/mpi.h
100101

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