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‎CHANGELOG.md‎

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@@ -2,6 +2,13 @@
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## Release 515 Entries
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### [515.76] 2022-09-20
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#### Fixed
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- Improved compatibility with new Linux kernel releases
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- Fixed possible excessive GPU power draw on an idle X11 or Wayland desktop when driving high resolutions or refresh rates
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### [515.65.01] 2022-08-02
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#### Fixed

‎README.md‎

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# NVIDIA Linux Open GPU Kernel Module Source
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This is the source release of the NVIDIA Linux open GPU kernel modules,
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version 515.65.01.
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version 515.76.
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## How to Build
@@ -17,7 +17,7 @@ as root:
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Note that the kernel modules built here must be used with gsp.bin
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firmware and user-space NVIDIA GPU driver components from a corresponding
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515.65.01 driver release. This can be achieved by installing
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515.76 driver release. This can be achieved by installing
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the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
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option. E.g.,
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@@ -167,15 +167,15 @@ for the target kernel.
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## Compatible GPUs
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The open-gpu-kernel-modules can be used on any Turing or later GPU
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(see the table below). However, in the 515.65.01 release,
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(see the table below). However, in the 515.76 release,
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GeForce and Workstation support is still considered alpha-quality.
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To enable use of the open kernel modules on GeForce and Workstation GPUs,
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set the "NVreg_OpenRmEnableUnsupportedGpus" nvidia.ko kernel module
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parameter to 1. For more details, see the NVIDIA GPU driver end user
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README here:
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https://us.download.nvidia.com/XFree86/Linux-x86_64/515.65.01/README/kernel_open.html
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https://us.download.nvidia.com/XFree86/Linux-x86_64/515.76/README/kernel_open.html
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In the below table, if three IDs are listed, the first is the PCI Device
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ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI
@@ -643,6 +643,8 @@ Subsystem Device ID.
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| NVIDIA A100-PG509-200 | 20B0 10DE 1450 |
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| NVIDIA A100-SXM4-80GB | 20B2 10DE 1463 |
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| NVIDIA A100-SXM4-80GB | 20B2 10DE 147F |
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| NVIDIA A100-SXM4-80GB | 20B2 10DE 1622 |
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| NVIDIA A100-SXM4-80GB | 20B2 10DE 1623 |
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| NVIDIA PG506-242 | 20B3 10DE 14A7 |
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| NVIDIA PG506-243 | 20B3 10DE 14A8 |
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| NVIDIA A100 80GB PCIe | 20B5 10DE 1533 |
@@ -743,6 +745,7 @@ Subsystem Device ID.
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| NVIDIA GeForce RTX 3050 | 2507 |
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| NVIDIA GeForce RTX 3050 OEM | 2508 |
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| NVIDIA GeForce RTX 3060 Laptop GPU | 2520 |
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| NVIDIA GeForce RTX 3060 Laptop GPU | 2521 |
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| NVIDIA GeForce RTX 3050 Ti Laptop GPU | 2523 |
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| NVIDIA RTX A2000 | 2531 1028 151D |
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| NVIDIA RTX A2000 | 2531 103C 151D |

‎kernel-open/Kbuild‎

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@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
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EXTRA_CFLAGS += -I$(src)
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EXTRA_CFLAGS += -Wall -MD $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
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EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
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EXTRA_CFLAGS += -DNV_VERSION_STRING=\"515.65.01\"
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EXTRA_CFLAGS += -DNV_VERSION_STRING=\"515.76\"
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EXTRA_CFLAGS += -Wno-unused-function
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@@ -203,9 +203,108 @@ $(obj)/conftest/patches.h: $(NV_CONFTEST_SCRIPT)
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@mkdir -p $(obj)/conftest
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@$(NV_CONFTEST_CMD) patch_check > $@
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$(obj)/conftest/headers.h: $(NV_CONFTEST_SCRIPT)
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@mkdir -p $(obj)/conftest
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@$(NV_CONFTEST_CMD) test_kernel_headers '$(NV_CONFTEST_CFLAGS)' > $@
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# Each of these headers is checked for presence with a test #include; a
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# corresponding #define will be generated in conftest/headers.h.
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NV_HEADER_PRESENCE_TESTS = \
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asm/system.h \
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drm/drmP.h \
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drm/drm_auth.h \
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drm/drm_gem.h \
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drm/drm_crtc.h \
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drm/drm_atomic.h \
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drm/drm_atomic_helper.h \
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drm/drm_encoder.h \
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drm/drm_atomic_uapi.h \
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drm/drm_drv.h \
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drm/drm_framebuffer.h \
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drm/drm_connector.h \
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drm/drm_probe_helper.h \
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drm/drm_blend.h \
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drm/drm_fourcc.h \
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drm/drm_prime.h \
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drm/drm_plane.h \
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drm/drm_vblank.h \
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drm/drm_file.h \
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drm/drm_ioctl.h \
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drm/drm_device.h \
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drm/drm_mode_config.h \
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dt-bindings/interconnect/tegra_icc_id.h \
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generated/autoconf.h \
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generated/compile.h \
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generated/utsrelease.h \
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linux/efi.h \
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linux/kconfig.h \
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linux/platform/tegra/mc_utils.h \
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linux/semaphore.h \
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linux/printk.h \
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linux/ratelimit.h \
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linux/prio_tree.h \
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linux/log2.h \
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linux/of.h \
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linux/bug.h \
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linux/sched/signal.h \
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linux/sched/task.h \
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linux/sched/task_stack.h \
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xen/ioemu.h \
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linux/fence.h \
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linux/dma-resv.h \
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soc/tegra/chip-id.h \
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soc/tegra/fuse.h \
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soc/tegra/tegra_bpmp.h \
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video/nv_internal.h \
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linux/platform/tegra/dce/dce-client-ipc.h \
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linux/nvhost.h \
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linux/nvhost_t194.h \
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asm/book3s/64/hash-64k.h \
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asm/set_memory.h \
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asm/prom.h \
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asm/powernv.h \
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linux/atomic.h \
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asm/barrier.h \
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asm/opal-api.h \
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sound/hdaudio.h \
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asm/pgtable_types.h \
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linux/stringhash.h \
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linux/dma-map-ops.h \
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rdma/peer_mem.h \
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sound/hda_codec.h \
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linux/dma-buf.h \
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linux/time.h \
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linux/platform_device.h \
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linux/mutex.h \
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linux/reset.h \
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linux/of_platform.h \
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linux/of_device.h \
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linux/of_gpio.h \
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linux/gpio.h \
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linux/gpio/consumer.h \
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linux/interconnect.h \
283+
linux/pm_runtime.h \
284+
linux/clk.h \
285+
linux/clk-provider.h \
286+
linux/ioasid.h \
287+
linux/stdarg.h \
288+
linux/iosys-map.h \
289+
asm/coco.h
290+
291+
# Filename to store the define for the header in $(1); this is only consumed by
292+
# the rule below that concatenates all of these together.
293+
NV_HEADER_PRESENCE_PART = $(addprefix $(obj)/conftest/header_presence/,$(addsuffix .part,$(1)))
294+
295+
# Define a rule to check the header $(1).
296+
define NV_HEADER_PRESENCE_CHECK
297+
$$(call NV_HEADER_PRESENCE_PART,$(1)): $$(NV_CONFTEST_SCRIPT) $(obj)/conftest/uts_release
298+
@mkdir -p $$(dir $$@)
299+
@$$(NV_CONFTEST_CMD) test_kernel_header '$$(NV_CONFTEST_CFLAGS)' '$(1)' > $$@
300+
endef
301+
302+
# Evaluate the rule above for each header in the list.
303+
$(foreach header,$(NV_HEADER_PRESENCE_TESTS),$(eval $(call NV_HEADER_PRESENCE_CHECK,$(header))))
304+
305+
# Concatenate all of the parts into headers.h.
306+
$(obj)/conftest/headers.h: $(call NV_HEADER_PRESENCE_PART,$(NV_HEADER_PRESENCE_TESTS))
307+
@cat $^ > $@
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210309
clean-dirs := $(obj)/conftest
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‎kernel-open/common/inc/nv-linux.h‎

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@@ -227,6 +227,7 @@ static inline uid_t __kuid_val(uid_t uid)
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#endif
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229229
#include <linux/fb.h> /* fb_info struct */
230+
#include <linux/screen_info.h> /* screen_info */
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231232
#if !defined(CONFIG_PCI)
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#warning "Attempting to build driver for a platform with no PCI support!"

‎kernel-open/common/inc/nv-pgprot.h‎

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@@ -78,13 +78,8 @@ static inline pgprot_t pgprot_modify_writecombine(pgprot_t old_prot)
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7979
#define NV_PGPROT_UNCACHED_DEVICE(old_prot) pgprot_noncached(old_prot)
8080
#if defined(NVCPU_AARCH64)
81-
#if defined(NV_MT_DEVICE_GRE_PRESENT)
82-
#define NV_PROT_WRITE_COMBINED_DEVICE (PROT_DEFAULT | PTE_PXN | PTE_UXN | \
83-
PTE_ATTRINDX(MT_DEVICE_GRE))
84-
#else
8581
#define NV_PROT_WRITE_COMBINED_DEVICE (PROT_DEFAULT | PTE_PXN | PTE_UXN | \
8682
PTE_ATTRINDX(MT_DEVICE_nGnRE))
87-
#endif
8883
#define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot) \
8984
__pgprot_modify(old_prot, PTE_ATTRINDX_MASK, NV_PROT_WRITE_COMBINED_DEVICE)
9085
#define NV_PGPROT_WRITE_COMBINED(old_prot) NV_PGPROT_UNCACHED(old_prot)

‎kernel-open/common/inc/nv.h‎

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624624
#define NV_GET_NV_STATE(pGpu) \
625625
(nv_state_t *)((pGpu) ? (pGpu)->pOsGpuInfo : NULL)
626626

627-
#define IS_REG_OFFSET(nv, offset, length) \
628-
(((offset) >= (nv)->regs->cpu_address) && \
629-
(((offset) + ((length)-1)) <= \
630-
(nv)->regs->cpu_address + ((nv)->regs->size-1)))
631-
632-
#define IS_FB_OFFSET(nv, offset, length) \
633-
(((nv)->fb) && ((offset) >= (nv)->fb->cpu_address) && \
634-
(((offset) + ((length)-1)) <= (nv)->fb->cpu_address + ((nv)->fb->size-1)))
635-
636-
#define IS_UD_OFFSET(nv, offset, length) \
637-
(((nv)->ud.cpu_address != 0) && ((nv)->ud.size != 0) && \
638-
((offset) >= (nv)->ud.cpu_address) && \
639-
(((offset) + ((length)-1)) <= (nv)->ud.cpu_address + ((nv)->ud.size-1)))
640-
641-
#define IS_IMEM_OFFSET(nv, offset, length) \
642-
(((nv)->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address != 0) && \
643-
((nv)->bars[NV_GPU_BAR_INDEX_IMEM].size != 0) && \
644-
((offset) >= (nv)->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address) && \
645-
(((offset) + ((length) - 1)) <= \
646-
(nv)->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address + \
647-
((nv)->bars[NV_GPU_BAR_INDEX_IMEM].size - 1)))
627+
static inline NvBool IS_REG_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
628+
{
629+
return ((offset >= nv->regs->cpu_address) &&
630+
631+
632+
633+
((offset + (length - 1)) <= (nv->regs->cpu_address + (nv->regs->size - 1))));
634+
}
635+
636+
static inline NvBool IS_FB_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
637+
{
638+
return ((nv->fb) && (offset >= nv->fb->cpu_address) &&
639+
640+
641+
642+
((offset + (length - 1)) <= (nv->fb->cpu_address + (nv->fb->size - 1))));
643+
}
644+
645+
static inline NvBool IS_UD_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
646+
{
647+
return ((nv->ud.cpu_address != 0) && (nv->ud.size != 0) &&
648+
(offset >= nv->ud.cpu_address) &&
649+
650+
651+
652+
((offset + (length - 1)) <= (nv->ud.cpu_address + (nv->ud.size - 1))));
653+
}
654+
655+
static inline NvBool IS_IMEM_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
656+
{
657+
return ((nv->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address != 0) &&
658+
(nv->bars[NV_GPU_BAR_INDEX_IMEM].size != 0) &&
659+
(offset >= nv->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address) &&
660+
661+
662+
663+
((offset + (length - 1)) <= (nv->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address +
664+
(nv->bars[NV_GPU_BAR_INDEX_IMEM].size - 1))));
665+
}
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649667
#define NV_RM_MAX_MSIX_LINES 8
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