|
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | +/* |
| 3 | + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. |
| 4 | + * |
| 5 | + */ |
| 6 | +/ { |
| 7 | + flash_rgb13h: flash-rgb13h { |
| 8 | + status = "okay"; |
| 9 | + compatible = "led,rgb13h"; |
| 10 | + label = "gpio-flash"; |
| 11 | + pinctrl-names = "default"; |
| 12 | + pinctrl-0 = <&flash_led_gpios>; |
| 13 | + led-max-microamp = <20000>; |
| 14 | + flash-max-microamp = <20000>; |
| 15 | + flash-max-timeout-us = <1000000>; |
| 16 | + enable-gpio = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>; |
| 17 | + rockchip,camera-module-index = <0>; |
| 18 | + rockchip,camera-module-facing = "back"; |
| 19 | + }; |
| 20 | + |
| 21 | + vcc_mipipwr: vcc-mipipwr-regulator { |
| 22 | + compatible = "regulator-fixed"; |
| 23 | + gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; |
| 24 | + pinctrl-names = "default"; |
| 25 | + pinctrl-0 = <&mipicam_pwr>; |
| 26 | + regulator-name = "vcc_mipipwr"; |
| 27 | + enable-active-high; |
| 28 | + regulator-boot-on; |
| 29 | + }; |
| 30 | +}; |
| 31 | + |
| 32 | +&csi2_dcphy0 { |
| 33 | + status = "okay"; |
| 34 | + |
| 35 | + ports { |
| 36 | + #address-cells = <1>; |
| 37 | + #size-cells = <0>; |
| 38 | + port@0 { |
| 39 | + reg = <0>; |
| 40 | + #address-cells = <1>; |
| 41 | + #size-cells = <0>; |
| 42 | + |
| 43 | + mipi_in_gc05a2: endpoint@1 { |
| 44 | + reg = <1>; |
| 45 | + remote-endpoint = <&gc05a2_out0>; |
| 46 | + data-lanes = <1 2 3 4>; |
| 47 | + }; |
| 48 | + |
| 49 | + }; |
| 50 | + port@1 { |
| 51 | + reg = <1>; |
| 52 | + #address-cells = <1>; |
| 53 | + #size-cells = <0>; |
| 54 | + |
| 55 | + csidcphy0_out: endpoint@0 { |
| 56 | + reg = <0>; |
| 57 | + remote-endpoint = <&mipi0_csi2_input>; |
| 58 | + }; |
| 59 | + }; |
| 60 | + }; |
| 61 | +}; |
| 62 | + |
| 63 | +&csi2_dphy3 { |
| 64 | + status = "okay"; |
| 65 | + |
| 66 | + ports { |
| 67 | + #address-cells = <1>; |
| 68 | + #size-cells = <0>; |
| 69 | + port@0 { |
| 70 | + reg = <0>; |
| 71 | + #address-cells = <1>; |
| 72 | + #size-cells = <0>; |
| 73 | + |
| 74 | + mipi_in_s5k3l8xx: endpoint@1 { |
| 75 | + reg = <1>; |
| 76 | + remote-endpoint = <&s5k3l8xx_out0>; |
| 77 | + data-lanes = <1 2 3 4>; |
| 78 | + }; |
| 79 | + |
| 80 | + mipi_in_ov16880: endpoint@2 { |
| 81 | + reg = <2>; |
| 82 | + remote-endpoint = <&ov16880_out0>; |
| 83 | + data-lanes = <1 2 3 4>; |
| 84 | + }; |
| 85 | + }; |
| 86 | + port@1 { |
| 87 | + reg = <1>; |
| 88 | + #address-cells = <1>; |
| 89 | + #size-cells = <0>; |
| 90 | + |
| 91 | + csidphy3_out: endpoint@0 { |
| 92 | + reg = <0>; |
| 93 | + remote-endpoint = <&mipi3_csi2_input>; |
| 94 | + }; |
| 95 | + }; |
| 96 | + }; |
| 97 | +}; |
| 98 | + |
| 99 | +&csi2_dphy0_hw { |
| 100 | + status = "okay"; |
| 101 | +}; |
| 102 | + |
| 103 | +&csi2_dphy1_hw { |
| 104 | + status = "okay"; |
| 105 | +}; |
| 106 | + |
| 107 | +&i2c4 { |
| 108 | + status = "okay"; |
| 109 | + pinctrl-0 = <&i2c4m3_xfer>; |
| 110 | + |
| 111 | + gc05a2: gc05a2@37 { |
| 112 | + compatible = "galaxycore,gc05a2"; |
| 113 | + status = "okay"; |
| 114 | + reg = <0x37>; |
| 115 | + clocks = <&cru CLK_MIPI_CAMERAOUT_M0>; |
| 116 | + clock-names = "xvclk"; |
| 117 | + pinctrl-names = "default"; |
| 118 | + pinctrl-0 = <&cam_clk0m0_clk0>; |
| 119 | + pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; |
| 120 | + reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; |
| 121 | + avdd-supply = <&vcc_mipipwr>; |
| 122 | + //dovdd-supply = <&vcc_1v8_cam>; |
| 123 | + //dvdd-supply = <&vcc1v2_dvp>; |
| 124 | + rockchip,camera-module-index = <1>; |
| 125 | + rockchip,camera-module-facing = "front"; |
| 126 | + rockchip,camera-module-name = "KYT-11210-V2"; |
| 127 | + rockchip,camera-module-lens-name = "default"; |
| 128 | + port { |
| 129 | + gc05a2_out0: endpoint { |
| 130 | + remote-endpoint = <&mipi_in_gc05a2>; |
| 131 | + data-lanes = <1 2>; |
| 132 | + }; |
| 133 | + }; |
| 134 | + }; |
| 135 | +}; |
| 136 | + |
| 137 | +&i2c5 { |
| 138 | + status = "okay"; |
| 139 | + pinctrl-names = "default"; |
| 140 | + pinctrl-0 = <&i2c5m3_xfer>; |
| 141 | + |
| 142 | + ces6301: ces6301@c { |
| 143 | + compatible = "chipextra,ces6301"; |
| 144 | + status = "okay"; |
| 145 | + reg = <0x0c>; |
| 146 | + avdd-supply = <&vcc_mipipwr>; |
| 147 | + rockchip,vcm-max-current = <120>; |
| 148 | + rockchip,vcm-start-current = <10>; |
| 149 | + rockchip,vcm-rated-current = <85>; |
| 150 | + rockchip,vcm-step-mode = <9>; |
| 151 | + rockchip,camera-module-index = <0>; |
| 152 | + rockchip,camera-module-facing = "back"; |
| 153 | + }; |
| 154 | + |
| 155 | + s5k3l8xx: s5k3l8xx@10 { |
| 156 | + status = "okay"; |
| 157 | + compatible = "samsung,s5k3l8xx"; |
| 158 | + reg = <0x10>; |
| 159 | + clocks = <&cru CLK_MIPI_CAMERAOUT_M2>; |
| 160 | + clock-names = "xvclk"; |
| 161 | + pinctrl-names = "default"; |
| 162 | + pinctrl-0 = <&cam_clk2m0_clk2>; |
| 163 | + pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; |
| 164 | + reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; |
| 165 | + avdd-supply = <&vcc_mipipwr>; |
| 166 | + //dovdd-supply = <&vcc_1v8_cam>; |
| 167 | + //dvdd-supply = <&vcc1v2_dvp>; |
| 168 | + rockchip,camera-module-index = <0>; |
| 169 | + rockchip,camera-module-facing = "back"; |
| 170 | + rockchip,camera-module-name = "KYT-11097-B-V1"; |
| 171 | + rockchip,camera-module-lens-name = "default"; |
| 172 | + lens-focus = <&ces6301>; |
| 173 | + flash-leds = <&flash_rgb13h>; |
| 174 | + port { |
| 175 | + s5k3l8xx_out0: endpoint { |
| 176 | + remote-endpoint = <&mipi_in_s5k3l8xx>; |
| 177 | + data-lanes = <1 2 3 4>; |
| 178 | + }; |
| 179 | + }; |
| 180 | + }; |
| 181 | + |
| 182 | + ov16880: ov16880@36 { |
| 183 | + status = "okay"; |
| 184 | + compatible = "ovti,ov16880"; |
| 185 | + reg = <0x36>; |
| 186 | + clocks = <&cru CLK_MIPI_CAMERAOUT_M2>; |
| 187 | + clock-names = "xvclk"; |
| 188 | + pinctrl-names = "default"; |
| 189 | + pinctrl-0 = <&cam_clk2m0_clk2>; |
| 190 | + pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; |
| 191 | + reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; |
| 192 | + avdd-supply = <&vcc_mipipwr>; |
| 193 | + //dovdd-supply = <&vcc_1v8_cam>; |
| 194 | + //dvdd-supply = <&vcc1v2_dvp>; |
| 195 | + rockchip,camera-module-index = <0>; |
| 196 | + rockchip,camera-module-facing = "back"; |
| 197 | + rockchip,camera-module-name = "KYT-11379-V1"; |
| 198 | + rockchip,camera-module-lens-name = "default"; |
| 199 | + lens-focus = <&ces6301>; |
| 200 | + flash-leds = <&flash_rgb13h>; |
| 201 | + port { |
| 202 | + ov16880_out0: endpoint { |
| 203 | + remote-endpoint = <&mipi_in_ov16880>; |
| 204 | + data-lanes = <1 2 3 4>; |
| 205 | + }; |
| 206 | + }; |
| 207 | + }; |
| 208 | +}; |
| 209 | + |
| 210 | +&mipi0_csi2 { |
| 211 | + status = "okay"; |
| 212 | + |
| 213 | + ports { |
| 214 | + #address-cells = <1>; |
| 215 | + #size-cells = <0>; |
| 216 | + |
| 217 | + port@0 { |
| 218 | + reg = <0>; |
| 219 | + #address-cells = <1>; |
| 220 | + #size-cells = <0>; |
| 221 | + |
| 222 | + mipi0_csi2_input: endpoint@1 { |
| 223 | + reg = <1>; |
| 224 | + remote-endpoint = <&csidcphy0_out>; |
| 225 | + }; |
| 226 | + }; |
| 227 | + |
| 228 | + port@1 { |
| 229 | + reg = <1>; |
| 230 | + #address-cells = <1>; |
| 231 | + #size-cells = <0>; |
| 232 | + |
| 233 | + mipi0_csi2_output: endpoint@0 { |
| 234 | + reg = <0>; |
| 235 | + remote-endpoint = <&cif_mipi_in0>; |
| 236 | + }; |
| 237 | + }; |
| 238 | + }; |
| 239 | +}; |
| 240 | + |
| 241 | +&mipi3_csi2 { |
| 242 | + status = "okay"; |
| 243 | + |
| 244 | + ports { |
| 245 | + #address-cells = <1>; |
| 246 | + #size-cells = <0>; |
| 247 | + |
| 248 | + port@0 { |
| 249 | + reg = <0>; |
| 250 | + #address-cells = <1>; |
| 251 | + #size-cells = <0>; |
| 252 | + |
| 253 | + mipi3_csi2_input: endpoint@1 { |
| 254 | + reg = <1>; |
| 255 | + remote-endpoint = <&csidphy3_out>; |
| 256 | + }; |
| 257 | + }; |
| 258 | + |
| 259 | + port@1 { |
| 260 | + reg = <1>; |
| 261 | + #address-cells = <1>; |
| 262 | + #size-cells = <0>; |
| 263 | + |
| 264 | + mipi3_csi2_output: endpoint@0 { |
| 265 | + reg = <0>; |
| 266 | + remote-endpoint = <&cif_mipi3_in0>; |
| 267 | + }; |
| 268 | + }; |
| 269 | + }; |
| 270 | +}; |
| 271 | + |
| 272 | +&pinctrl { |
| 273 | + cam { |
| 274 | + mipicam_pwr: mipicam-pwr { |
| 275 | + rockchip,pins = |
| 276 | + /* camera power en */ |
| 277 | + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; |
| 278 | + }; |
| 279 | + |
| 280 | + flash_led_gpios: flash-led { |
| 281 | + rockchip,pins = |
| 282 | + /* flash led enable */ |
| 283 | + <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; |
| 284 | + }; |
| 285 | + }; |
| 286 | +}; |
| 287 | + |
| 288 | +&rkcif { |
| 289 | + status = "okay"; |
| 290 | +}; |
| 291 | + |
| 292 | +&rkcif_mipi_lvds { |
| 293 | + status = "okay"; |
| 294 | + |
| 295 | + port { |
| 296 | + cif_mipi_in0: endpoint { |
| 297 | + remote-endpoint = <&mipi0_csi2_output>; |
| 298 | + }; |
| 299 | + }; |
| 300 | +}; |
| 301 | + |
| 302 | +&rkcif_mipi_lvds_sditf { |
| 303 | + status = "okay"; |
| 304 | + |
| 305 | + port { |
| 306 | + mipi_lvds_sditf: endpoint { |
| 307 | + remote-endpoint = <&isp_vir0_in0>; |
| 308 | + }; |
| 309 | + }; |
| 310 | +}; |
| 311 | + |
| 312 | +&rkcif_mipi_lvds3 { |
| 313 | + status = "okay"; |
| 314 | + |
| 315 | + port { |
| 316 | + cif_mipi3_in0: endpoint { |
| 317 | + remote-endpoint = <&mipi3_csi2_output>; |
| 318 | + }; |
| 319 | + }; |
| 320 | +}; |
| 321 | + |
| 322 | +&rkcif_mipi_lvds3_sditf { |
| 323 | + status = "okay"; |
| 324 | + |
| 325 | + port { |
| 326 | + mipi_lvds3_sditf: endpoint { |
| 327 | + remote-endpoint = <&isp_vir0_in1>; |
| 328 | + }; |
| 329 | + }; |
| 330 | +}; |
| 331 | + |
| 332 | +&rkcif_mmu { |
| 333 | + status = "okay"; |
| 334 | +}; |
| 335 | + |
| 336 | +&rkisp { |
| 337 | + status = "okay"; |
| 338 | +}; |
| 339 | + |
| 340 | +&rkisp_mmu { |
| 341 | + status = "okay"; |
| 342 | +}; |
| 343 | + |
| 344 | +&rkisp_vir0 { |
| 345 | + status = "okay"; |
| 346 | + |
| 347 | + port { |
| 348 | + #address-cells = <1>; |
| 349 | + #size-cells = <0>; |
| 350 | + |
| 351 | + isp_vir0_in0: endpoint@0 { |
| 352 | + reg = <0>; |
| 353 | + remote-endpoint = <&mipi_lvds_sditf>; |
| 354 | + }; |
| 355 | + |
| 356 | + isp_vir0_in1: endpoint@1 { |
| 357 | + reg = <1>; |
| 358 | + remote-endpoint = <&mipi_lvds3_sditf>; |
| 359 | + }; |
| 360 | + }; |
| 361 | +}; |
0 commit comments