@@ -53,204 +53,12 @@ this system only one side is actually transferring useful data at any time, so
5353whilst the Header is being sent the Host will receive Padding Bytes of ` 0xFF ` in
5454return (which can be discarded).
5555
56- A transfer is comprised of three stages.
56+ The NBMC exposes a number of registers - some can be read, some can be written
57+ to, some are cleared when written to.
5758
58- 1 . ` > ` Request
59- 2 . ` - ` Turn-Around
60- 3 . ` < ` Reponse
61-
62- A * Request* is a sequence of bytes sent from the * Host* to the * NBMC* .
63- * Turn-Around* is a period of time of interdeterminate length during which
64- the * Host* clocks out dummy bytes and the * NBMC* responds with ` 0xFF ` bytes,
65- which indicate that it has not yet formulated the * Response* . This period ends,
66- with the transmission of the * Response* from the * NBMC* to the * Host* .
67-
68- There are different kinds of * Request* that can be made. Each has a
69- corresponding * Response* .
70-
71- | Request Type | Contains | Length | Response Type |
72- | ------------------ | ------------------------------- | ------------ | ------------- |
73- | Read | Type, Register#, Length, CRC | 4 | Read |
74- | Short Write | Type, Register#, Data Byte, CRC | 4 | Short |
75- | Long Write Start | Type, Register#, Length, CRC | 4 | Short |
76- | Long Write Payload | ` Length ` Bytes, CRC | ` Length ` + 1 | Short |
77-
78- | Response Type | Contains | Length |
79- | ------------- | --------------------------- | ------------ |
80- | Short | Result, CRC | 2 |
81- | Read | Result, ` Length ` Bytes, CRC | ` Length ` + 2 |
82-
83- To allow the * NBMC* to be efficient at receiving data over SPI, it is important
84- that the first * Request* received after the ` nCS ` pin goes active-low is of a
85- fixed length. Here, all of the initial * Requests* have a fixed size of four
86- bytes. A * Long Write Start Request* tells the * NBMC* to expect a * Request* of a
87- different length to follow immediately after, which allows the * NBMC* to
88- re-configure the DMA to expect the longer length * Request* . The * Long Write
89- Payload* MUST only be sent following a * Long Write Start* , and without resetting
90- the ` nCS ` signal in-between.
91-
92- ### Request Types
93-
94- * ` 0xC0 ` : Read
95- * ` 0xC1 ` : Read (alternate)
96- * ` 0xC2 ` : Short Write
97- * ` 0xC3 ` : Long Write
98-
99- ### Response Results
100-
101- * ` 0xA0 ` : OK
102- * ` 0xA1 ` : CRC Failure
103- * ` 0xA2 ` : Bad Request Type
104- * ` 0xA3 ` : Bad Register#
105- * ` 0xA4 ` : Bad Length
106-
107- ### Read Request / Response Sequence
108-
109- A * Read Request* consists of four 8-bit values:
110-
111- * A * Type* byte of either ` 0xC0 ` or ` 0xC1 ` marking this as a * Read Request* .
112- * A * Register#* , indicating which register within the * NBMC* the * Host* wishes
113- to read.
114- * A Length, indicating how many bytes are to be read from the given * Register#* .
115- * A * CRC* , which is the CRC-8 of the proceeding three bytes.
116-
117- The * Type* byte should alternate between ` 0xC0 ` and ` 0xC1 ` so that the * NBMC*
118- can tell if the * Read Request* is a repeat of the previous request. This may
119- occur, for example, if the * Read Response* fails its CRC check on arrival at the
120- * Host* . Because a * Read Request* can have side-effects (like removing bytes from
121- a FIFO), a repeated * Read Request* should return preceisely the same values as
122- before, rather than, say, fetching more new bytes from the FIFO. This allows the
123- FIFO to be read in a lossless fashion, even when there is occasional corruption
124- on the SPI bus.
125-
126- A * Read Response* consists of a variable number of 8-bit values:
127-
128- * A * Response Result* code indicating whether the read operation was successful
129- or not.
130- * A * Payload* consisting of the number of bytes requested in the * Read
131- Operation* (only present if the * Result* byte indicates Success)
132- * A * CRC* , which is the CRC-8 of all the proceeding bytes.
133-
134- #### Example of Success
135-
136- ``` mermaid
137- sequenceDiagram
138-
139- Host->>NBMC: ReadRequest(25, 5)
140- Note over Host, NBMC: Read 5 bytes from Register 25
141-
142- NBMC->>NBMC: Reads from register
143-
144- NBMC->>Host: Response(OK, [0, 1, 2, 3, 4])
145-
146- Note over Host, NBMC: Host get the five bytes
147- ```
148-
149- #### Example of Failure
150-
151- ``` mermaid
152- sequenceDiagram
153-
154- Host->>NBMC: ReadRequest(25, 200)
155- Note over Host, NBMC: Read 200 bytes from Register 25
156-
157- NBMC->>Host: Response(BadLength)
158-
159- Note over Host, NBMC: NBMC says no.
160- ```
161-
162- ### Short Write Request / Response Sequence
163-
164- A * Short Write Request* consists of four 8-bit values:
165-
166- * A * Type* byte of ` 0xC2 ` marking this as a * Short Write Request* .
167- * A * Register#* , indicating which register within the * NBMC* the * Host* wishes to write to.
168- * A * Data Byte* , which is to be written to the given * Register#* .
169- * A * CRC* , which is the CRC-8 of the proceeding three bytes.
170-
171- A * Short Response* is sent in returning, containing two bytes:
172-
173- * A [ * Response Result* ] ( #response-result-codes ) code indicating whether the read
174- operation was successful or not.
175- * A * CRC* , which is the CRC-8 of all the sole proceeding byte.
176-
177- You could equally consider a * Short Response* as a single 16-bit big-endian
178- value, being one of ` 0xA069 ` , ` 0xA16E ` , ` 0xA267 ` , ` 0xA360 ` or ` 0xA475 ` .
179-
180- #### Example of Success
181-
182- ``` mermaid
183- sequenceDiagram
184-
185- Host->>NBMC: ShortWriteRequest(10, 0xAA)
186- Note over Host, NBMC: Write 0xAA to Register 10
187-
188- NBMC->>NBMC: Writes to register
189-
190- NBMC->>Host: Response(OK)
191-
192- Note over Host, NBMC: NBMC is happy.
193- ```
194-
195- ### Long Write Request / Response Sequence
196-
197- A * Long Write Request* consists of four 8-bit values:
198-
199- * A * Type* byte of ` 0xC2 ` marking this as a * Short Write Request* .
200- * A * Register#* , indicating which register within the * NBMC* the * Host* wishes to write to.
201- * A * Length* , which is the number of payload bytes to follow in the subsequent * Long Write Payload* .
202- * A * CRC* , which is the CRC-8 of the proceeding three bytes.
203-
204- A * Short Response* is sent, as per [ Short Write
205- Request] ( #short-write-request--response-sequence )
206-
207- If a * Short Response* is received containing a * Response Result* of ** OK**
208- (` 0xA0 ` ), the * NBMC* is ready to receive a * Long Write Payload* . If any other
209- * Response Result* is received, the * Long Write Payload* must not be send and
210- ` nCS ` must be raised to indicate the end of the transaction.
211-
212- A * Long Write Payload* consists of a variable number of 8-bit values:
213-
214- * A * Payload* consisting of the number of bytes requested in the * Long Write Request*
215- * A * CRC* , which is the CRC-8 of all the proceeding bytes.
216-
217- This message must always contain exactly the number of bytes stated in the
218- * Length* field of the * Long Write Request* , plus one additional CRC byte.
219-
220- A second * Short Response* is then sent, as per [ Short Write
221- Request] ( #short-write-request--response-sequence ) . The ` nCS ` signal must be
222- raised at this point to restart the write sequence, regardless of the specific
223- * Response Result* sent.
224-
225- #### Example of Success
226- ``` mermaid
227- sequenceDiagram
228-
229- Host->>NBMC: LongWriteRequest(16, 5)
230- Note over Host, NBMC: Prepare to write 5 bytes to Register 16
231-
232- NBMC->>NBMC: Thinks for while
233-
234- NBMC->>Host: Response(OK)
235-
236- Note over Host, NBMC: NBMC is ready to take 5 bytes.
237-
238- Host->>NBMC: LongWritePayload([0, 1, 2, 3, 4])
239- Note over Host, NBMC: Five bytes are sent
240-
241- NBMC->>NBMC: Checks CRC
242-
243- NBMC->>Host: Response(CrcFailure)
244-
245- Note over Host, NBMC: NBMC is sad. The five bytes<br/>must have been corrupted as their CRC didn't match.
246- ```
247-
248- ### Cancelling
249-
250- Any * Request* can be cancelled by the * Host* lifting ` nCS ` high before the
251- * Request* has finished sending. This allows the * NBMC* to accomodate unexpected
252- * Host* reboots (as during a reboot it is expected that the ` nCS ` line will be
253- raised).
59+ See [ neotron-bmc-protocol's README] ( ./neotron-bmc-protocol/README.md ) for more
60+ details of how the registers are accessed. The registers themselves are defined
61+ below.
25462
25563## System Registers
25664
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