Increase core0 stack to 8K and paint/measure stack usage.

Author: thejpster

.cargo/config.toml

@@ -2,8 +2,7 @@
 # This will make a UF2 and copy it to the RP2040's Mass Storage Device bootloader
 # runner = "elf2uf2-rs -d"
 # This will flash over SWD with any compatible probe it finds. You need 0.3.1 or higher for RP2040 support.
-runner = "probe-run --chip RP2040 --measure-stack"
-
+runner = "probe-run --chip RP2040"
 rustflags = [
   # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
   # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
@@ -17,4 +16,4 @@ rustflags = [
 ]
 
 [build]
-target = "thumbv6m-none-eabi"        # Cortex-M0 and Cortex-M0+
+target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+

Cargo.toml

@@ -77,3 +77,6 @@ lto = true
 # good choice for performance on the RP2040, where code executes from external
 # SPI Flash and has to be buffered in a small on-chip cache memory.
 opt-level = "s"
+
+[features]
+check-stack = []

memory.x

@@ -25,30 +25,33 @@ MEMORY {
     /*
      * This is the bottom of the four striped banks of SRAM in the RP2040.
      */
-    RAM_OS : ORIGIN = 0x20000000, LENGTH = 0x3A000
+    RAM_OS : ORIGIN = 0x20000000, LENGTH = 0x39000
     /*
      * This is the top of the four striped banks of SRAM in the RP2040.
      *
-     * We give ourselves six 4K pages [0x3A_000, 0x40_000]
+     * We give ourselves size 4K pages [0x39_000..0x3E_FFF]
      */
-    RAM : ORIGIN = 0x2003A000, LENGTH = 24K
+    RAM : ORIGIN = 0x20039000, LENGTH = 24K
     /*
-     * This is the fifth bank, a 4KB block. We use this for Core 0 Stack.
+     * This 4K from the top of striped RAM, plus the fifth bank - another a 4KB
+     * block. We use this for Core 0 Stack. We tried 4K but it wasn't enough.
      */
-    RAM_CORE0_STACK : ORIGIN = 0x20040000, LENGTH = 4K
+    RAM_CORE0_STACK : ORIGIN = 0x2003F000, LENGTH = 8K
     /*
      * This is the sixth bank, a 4KB block. We use this for Core 1 Stack.
+     * As of 0.5.1 Pico BIOS uses about 316 bytes of this but we give it the
+     * full 4K so it can have uncontended access to this SRAM bank.
      */
     RAM_CORE1_STACK : ORIGIN = 0x20041000, LENGTH = 4K
 }
 
 /*
  * This is where the call stack for Core 0 will be located. The stack is of
- * the full descending type. You may want to use this variable to locate the
- * call stack and static variables in different memory regions. Below is
- * shown the default value
+ * the full descending type.
  */
 _stack_start = ORIGIN(RAM_CORE0_STACK) + LENGTH(RAM_CORE0_STACK);
+_stack_bottom = ORIGIN(RAM_CORE0_STACK);
+_stack_len = LENGTH(RAM_CORE0_STACK);
 
 /*
  * This is where the call stack for Core 1 will be located.

src/main.rs

@@ -311,6 +311,12 @@ extern "C" {
 	static mut _ram_os_len: u32;
 }
 
+/// What we paint Core 0's stack with
+const CORE0_STACK_PAINT_WORD: usize = 0xBBBB_BBBB;
+
+/// What we paint Core 1's stack with
+const CORE1_STACK_PAINT_WORD: usize = 0xCCCC_CCCC;
+
 // -----------------------------------------------------------------------------
 // Functions
 // -----------------------------------------------------------------------------
@@ -333,6 +339,27 @@ fn main() -> ! {
 	// Reset the spinlocks.
 	pp.SIO.spinlock[31].reset();
 
+	{
+		// Paint the stack
+		extern "C" {
+			static mut _stack_bottom: usize;
+			static mut _stack_len: usize;
+		}
+		// But not the top 64 words, because we're using the stack right now!
+		let stack = unsafe {
+			core::slice::from_raw_parts_mut(
+				&mut _stack_bottom as *mut usize,
+				(&mut _stack_len as *const _ as usize / core::mem::size_of::<usize>()) - 256,
+			)
+		};
+		info!("Painting {:?}", stack.as_ptr_range());
+		for b in stack.iter_mut() {
+			*b = CORE0_STACK_PAINT_WORD;
+		}
+	}
+
+	check_stacks();
+
 	// Needed by the clock setup
 	let mut watchdog = hal::watchdog::Watchdog::new(pp.WATCHDOG);
 
@@ -1897,6 +1924,7 @@ extern "C" fn bus_interrupt_status() -> u32 {
 /// media is indicated with a boolean field in the
 /// `block_dev::DeviceInfo` structure.
 pub extern "C" fn block_dev_get_info(device: u8) -> common::Option<common::block_dev::DeviceInfo> {
+	check_stacks();
 	match device {
 		0 => {
 			let mut lock = HARDWARE.lock();
@@ -1970,6 +1998,7 @@ pub extern "C" fn block_read(
 	data: common::ApiBuffer,
 ) -> common::Result<()> {
 	use embedded_sdmmc::BlockDevice;
+	check_stacks();
 	if data.data_len != usize::from(num_blocks) * 512 {
 		return common::Result::Err(common::Error::UnsupportedConfiguration(0));
 	}
@@ -2087,6 +2116,49 @@ fn IO_IRQ_BANK0() {
 	cortex_m::asm::sev();
 }
 
+/// Measure how much stack space remains unused.
+#[cfg(feature = "check-stack")]
+fn check_stacks() {
+	extern "C" {
+		static _stack_bottom: usize;
+		static _stack_len: usize;
+		static _core1_stack_bottom: usize;
+		static _core1_stack_len: usize;
+	}
+	let p = unsafe { &_stack_bottom as *const usize };
+	let total_bytes = unsafe { &_stack_len as *const usize as usize };
+	check_stack(p, total_bytes, CORE0_STACK_PAINT_WORD);
+	let p = unsafe { &_core1_stack_bottom as *const usize };
+	let total_bytes = unsafe { &_core1_stack_len as *const usize as usize };
+	check_stack(p, total_bytes, CORE1_STACK_PAINT_WORD);
+}
+
+/// Dummy stack checker that does nothing
+#[cfg(not(feature = "check-stack"))]
+fn check_stacks() {}
+
+/// Check an individual stack to see how much has been used
+#[cfg(feature = "check-stack")]
+fn check_stack(start: *const usize, stack_len_bytes: usize, check_word: usize) {
+	let mut p: *const usize = start;
+	let mut free_bytes = 0;
+	loop {
+		let value = unsafe { p.read_volatile() };
+		if value != check_word {
+			break;
+		}
+		// Safety: We must hit a used stack value somewhere!
+		p = unsafe { p.offset(1) };
+		free_bytes += core::mem::size_of::<usize>();
+	}
+	defmt::debug!(
+		"Stack free at 0x{:08x}: {} bytes used of {} bytes",
+		start,
+		stack_len_bytes - free_bytes,
+		stack_len_bytes
+	);
+}
+
 /// Called when the CPU Hard Faults.
 ///
 /// This probably means something panicked, and the Rust code was compiled to

src/vga/mod.rs

@@ -1034,10 +1034,14 @@ pub fn init(
 		}
 		core::slice::from_raw_parts_mut(
 			&mut _core1_stack_bottom as *mut _,
-			&mut _core1_stack_len as *const _ as usize / 4,
+			&mut _core1_stack_len as *const _ as usize / core::mem::size_of::<usize>(),
 		)
 	};
 
+	for b in core1_stack.iter_mut() {
+		*b = super::CORE1_STACK_PAINT_WORD;
+	}
+
 	debug!(
 		"Core 1 stack: {:08x}, {} bytes",
 		core1_stack.as_ptr(),