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Updated README
Specified the pinout for the Pico based on the schematic Noted you could use an HDMI PMOD if you wanted
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‎README.md‎

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@@ -56,32 +56,32 @@ The limited I/O on the Pico (we are using half the available pins just for the v
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| Pin | Name | Signal | Function |
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| :--- | :--- | :------------- | :------------------------------------------------- |
59-
| xx | GPx | VGA_RED0 | Digital VGA signal, Red channel LSB |
60-
| xx | GPx | VGA_RED1 | Digital VGA signal, Red channel |
61-
| xx | GPx | VGA_RED2 | Digital VGA signal, Red channel |
62-
| xx | GPx | VGA_RED3 | Digital VGA signal, Red channel MSB |
63-
| xx | GPx | VGA_GREEN0 | Digital VGA signal, Green channel LSB |
64-
| xx | GPx | VGA_GREEN1 | Digital VGA signal, Green channel |
65-
| xx | GPx | VGA_GREEN2 | Digital VGA signal, Green channel |
66-
| xx | GPx | VGA_GREEN3 | Digital VGA signal, Green channel MSB |
67-
| xx | GPx | VGA_BLUE0 | Digital VGA signal, Blue channel LSB |
68-
| xx | GPx | VGA_BLUE1 | Digital VGA signal, Blue channel |
69-
| xx | GPx | VGA_BLUE2 | Digital VGA signal, Blue channel |
70-
| xx | GPx | VGA_BLUE3 | Digital VGA signal, Blue channel MSB |
71-
| xx | GPx | VGA_HSYNC | VGA Horizontal Sync (31.5 kHz) |
72-
| xx | GPx | VGA_VSYNC | VGA Vertical Sync (60 Hz) |
73-
| xx | GPx | I2C_SDA | I²C Data |
74-
| xx | GPx | I2C_SCL | I²C Clock |
75-
| xx | GPx | SPI_CLK | SPI Clock |
76-
| xx | GPx | SPI_CIPO | SPI Data In |
77-
| xx | GPx | SPI_COPI | SPI Data Out |
78-
| xx | GPx | SPI_CS_nIOCS | Low selects MCP23S17, High selects Expansion Slots |
79-
| xx | GPx | nIRQn | Interrupt Request Input from MCP23S17 |
80-
| xx | GPx | I2S_DAC_DATA | Digital Audio Output |
81-
| xx | GPx | I2S_ADC_DATA | Digital Audio Input |
82-
| xx | GPx | I2S_BIT_CLOCK | Digital Audio Bit Clock (1.536MHz) |
83-
| xx | GPx | I2S_LR_CLOCK | Digital Audio Sync (96kHz) |
84-
| xx | GPx | I2S_MAIN_CLOCK | Digital Audio Master Clock (12.288MHz) |
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| 01 | GP0 | VGA_HSYNC | VGA Horizontal Sync (31.5 kHz) |
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| 02 | GP1 | VGA_VSYNC | VGA Vertical Sync (60 Hz) |
61+
| 04 | GP2 | VGA_RED0 | Digital VGA signal, Red channel LSB |
62+
| 05 | GP3 | VGA_RED1 | Digital VGA signal, Red channel |
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| 06 | GP4 | VGA_RED2 | Digital VGA signal, Red channel |
64+
| 07 | GP5 | VGA_RED3 | Digital VGA signal, Red channel MSB |
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| 09 | GP6 | VGA_GREEN0 | Digital VGA signal, Green channel LSB |
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| 10 | GP7 | VGA_GREEN1 | Digital VGA signal, Green channel |
67+
| 11 | GP8 | VGA_GREEN2 | Digital VGA signal, Green channel |
68+
| 12 | GP9 | VGA_GREEN3 | Digital VGA signal, Green channel MSB |
69+
| 14 | GP10 | VGA_BLUE0 | Digital VGA signal, Blue channel LSB |
70+
| 15 | GP11 | VGA_BLUE1 | Digital VGA signal, Blue channel |
71+
| 16 | GP12 | VGA_BLUE2 | Digital VGA signal, Blue channel |
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| 17 | GP13 | VGA_BLUE3 | Digital VGA signal, Blue channel MSB |
73+
| 19 | GP14 | I2C_SDA | I²C Data |
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| 20 | GP15 | I2C_SCL | I²C Clock |
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| 21 | GP16 | SPI_CIPO | SPI Data In |
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| 22 | GP17 | SPI_CS_nIOCS | Low selects MCP23S17, High selects Expansion Slots |
77+
| 24 | GP18 | SPI_CLK | SPI Clock |
78+
| 25 | GP19 | SPI_COPI | SPI Data Out |
79+
| 26 | GP20 | nIRQn | Interrupt Request Input from MCP23S17 |
80+
| 27 | GP21 | nOUTPUT_EN | Enable buffered CS outputs from MCP23S17 |
81+
| 29 | GP22 | I2S_DAC_DATA | Digital Audio Output |
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| 31 | GP26 | I2S_ADC_DATA | Digital Audio Input |
83+
| 32 | GP27 | I2S_LR_CLOCK | Digital Audio Sync (96kHz) |
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| 34 | GP28 | I2S_BIT_CLOCK | Digital Audio Bit Clock (1.536MHz) |
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### Super VGA output
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@@ -97,6 +97,8 @@ The Raspberry Pi Silicon RP2040 generates 12-bit VGA video at a range of standar
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* Texas Instruments TPD7S019 Sync/DDC level shifter and RGB EMC filter
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* SSOP-16 package (0.635mm pitch)
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The design could easily be adapted to remove the TPF133A/THS7316 video buffer and the TPD7S019 level shifter/filter, and instead use the [1BitSquared DVI PMOD](https://1bitsquared.com/collections/fpga/products/pmod-digital-video-interface) board if you prefer a DVI output (using an HDMI connector).
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### Audio Codec
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The audio subsystem offers 16-bit 48 kHz stereo audio in and out through a classic blue/green/pink triple 3.5mm TRS jack. Input and Output volume can be software controlled.
@@ -136,19 +138,19 @@ Power-on Reset sequencing, soft shutdown, voltage monitoring and PS/2 interfacin
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| Pin | Name | Signal | Function |
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| :--- | :--- | :--------- | :------------------------------------------- |
139-
| 02 | PF0 | BUTTON_PWR | Power Button Input (active low) |
140-
| 03 | PF1 | HOST_RST | Reset Output to reset the rest of the system |
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| 02 | PF0 | BUTTON_nPWR| Power Button Input (active low) |
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| 03 | PF1 | HOST_nRST | Reset Output to reset the rest of the system |
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| 06 | PA0 | MON_3V3 | 3.3V rail monitor Input (1.65V nominal) |
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| 07 | PA1 | MON_5V | 5.0V rail monitor Input (1.65V nominal) |
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| 08 | PA2 | LED0 | PWM output for first Status LED |
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| 09 | PA3 | LED1 | PWM output for second Status LED |
145-
| 10 | PA4 | SPI1_NSS | SPI Chip Select Input (active low) |
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| 10 | PA4 | SPI1_nCS | SPI Chip Select Input (active low) |
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| 11 | PA5 | SPI1_SCK | SPI Clock Input |
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| 12 | PA6 | SPI1_CIPO | SPI Data Output |
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| 13 | PA7 | SPI1_COPI | SPI Data Input |
149-
| 14 | PB0 | BUTTON_RST | Reset Button Input (active low) |
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| 14 | PB0 | BUTTON_nRST| Reset Button Input (active low) |
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| 15 | PB1 | DC_ON | PSU Enable Output |
151-
| 18 | PA8 | HOST_NIRQ | Interrupt Output to the Host (active low) |
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| 18 | PA8 | IRQ_nHOST | Interrupt Output to the Host (active low) |
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| 19 | PA9 | I2C1_SCL | I²C Clock |
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| 20 | PA10 | I2C1_SDA | I²C Data |
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| 21 | PA11 | USART1_CTS | UART Clear-to-Send Output |
@@ -202,7 +204,7 @@ Interrupts are also processed through the MCP23S17. We configure the device to p
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```
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+------+ +-----+
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| |----------BUFFER_EN-------------->| |
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| |----------OUTPUT_EN-------------->| |
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| | | |
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| | +----------+ | |
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| | | | | |

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